PC56F8006VWL Datasheet, PDF (64/106 Pages) Freescale Semiconductor, Inc – Digital Signal Controller

Specifications
TCK
(Input)
TDI
TMS
(Input)
t_DV
t_DS
t_DH
Input Data Valid
TDO
(Output)
TDO
(Output)
Output Data Valid
t_TS
Figure 35. Test Access Port Timing Diagram
8.13.5 Dual Timer Timing
Table 33. Timer Timing^{1, 2}
Characteristic
Symbol
Min
Max
Unit
Timer input period
P_IN
2T + 6
—
ns
Timer input high/low period
P_INHL
1T + 3
—
ns
Timer output period
P_OUT
125
—
ns
Timer output high/low period
P_OUTHL
50
—
ns
1 _{In the formulas listed, T = the clock cycle. For 32 MHz operation, T = 31.25ns.}
2. Parameters listed are guaranteed by design.
See Figure
Figure 36
Figure 36
Figure 36
Figure 36
Timer Inputs
P_IN
P_INHL
P_INHL
Timer Outputs
P_OUT
P_OUTHL
Figure 36. Timer Timing
P_OUTHL
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
64
Freescale Semiconductor