K20P144M100SF2_11 Datasheet, PDF (64/74 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
8 Pinout
8.1 K20 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQF MAP
P BGA
— L5 NC
NC
NC
— M5 NC
NC
NC
— A10 NC
NC
NC
— B10 NC
NC
NC
— C10 NC
NC
NC
1 D3 PTE0
ADC1_SE4 ADC1_SE4 PTE0
a
a
SPI1_PCS1 UART1_TX SDHC0_D1
I2C1_SDA
2 D2 PTE1
ADC1_SE5 ADC1_SE5 PTE1
a
a
SPI1_SOUT UART1_RX SDHC0_D0
I2C1_SCL
3 D1 PTE2
ADC1_SE6 ADC1_SE6 PTE2
a
a
SPI1_SCK UART1_CT SDHC0_DC
S_b
LK
4 E4 PTE3
ADC1_SE7 ADC1_SE7 PTE3
a
a
SPI1_SIN UART1_RT SDHC0_CM
S_b
D
5 E5 VDD
VDD
VDD
6 F6 VSS
VSS
VSS
7 E3 PTE4
DISABLED
PTE4
SPI1_PCS0 UART3_TX SDHC0_D3
8 E2 PTE5
DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2
9 E1 PTE6
DISABLED
PTE6
SPI1_PCS3 UART3_CT I2S0_MCLK
S_b
I2S0_CLKIN
10 F4 PTE7
DISABLED
PTE7
UART3_RT I2S0_RXD
S_b
11 F3 PTE8
DISABLED
PTE8
UART5_TX I2S0_RX_F
S
12 F2 PTE9
DISABLED
PTE9
UART5_RX I2S0_RX_B
CLK
13 F1 PTE10
DISABLED
PTE10
UART5_CT I2S0_TXD
S_b
14 G4 PTE11
DISABLED
PTE11
UART5_RT I2S0_TX_F
S_b
S
15 G3 PTE12
DISABLED
PTE12
I2S0_TX_B
CLK
16 E6 VDD
VDD
VDD
17 F7 VSS
VSS
VSS
EzPort
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
64
Preliminary
Freescale Semiconductor, Inc.