K30P144M100SF2_11 Datasheet, PDF (62/72 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
8.1 K30 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQF MAP
P BGA
— L5 NC
NC
NC
— M5 NC
NC
NC
1 D3 PTE0
ADC1_SE4 ADC1_SE4 PTE0
a
a
SPI1_PCS1 UART1_TX SDHC0_D1 FB_AD27 I2C1_SDA
2 D2 PTE1
ADC1_SE5 ADC1_SE5 PTE1
a
a
SPI1_SOUT UART1_RX SDHC0_D0 FB_AD26 I2C1_SCL
3 D1 PTE2
ADC1_SE6 ADC1_SE6 PTE2
a
a
SPI1_SCK UART1_CT SDHC0_DC FB_AD25
S_b
LK
4 E4 PTE3
ADC1_SE7 ADC1_SE7 PTE3
a
a
SPI1_SIN UART1_RT SDHC0_CM FB_AD24
S_b
D
5 E5 VDD
VDD
VDD
6 F6 VSS
VSS
VSS
7 E3 PTE4
DISABLED
PTE4
SPI1_PCS0 UART3_TX SDHC0_D3 FB_CS3_b/ FB_TA_b
FB_BE7_0_
BLS31_24_
b
8 E2 PTE5
DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2 FB_TBST_b
/FB_CS2_b/
FB_BE15_8
_BLS23_16
_b
9 E1 PTE6
DISABLED
PTE6
SPI1_PCS3 UART3_CT I2S0_MCLK FB_ALE/ I2S0_CLKIN
S_b
FB_CS1_b/
FB_TS_b
10 F4 PTE7
DISABLED
PTE7
UART3_RT I2S0_RXD FB_CS0_b
S_b
11 F3 PTE8
DISABLED
PTE8
UART5_TX I2S0_RX_F FB_AD4
S
12 F2 PTE9
DISABLED
PTE9
UART5_RX I2S0_RX_B FB_AD3
CLK
13 F1 PTE10
DISABLED
PTE10
UART5_CT I2S0_TXD FB_AD2
S_b
14 G4 PTE11
DISABLED
PTE11
UART5_RT I2S0_TX_F FB_AD1
S_b
S
15 G3 PTE12
DISABLED
PTE12
I2S0_TX_B FB_AD0
CLK
16 E6 VDD
VDD
VDD
17 F7 VSS
VSS
VSS
18 H1 PTE16
ADC0_SE4 ADC0_SE4 PTE16
a
a
SPI0_PCS0 UART2_TX FTM_CLKIN
0
FTM0_FLT3
EzPort
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
62
Preliminary
Freescale Semiconductor, Inc.