K60P144M100SF2 Datasheet, PDF (61/69 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Data Sheet

Pinout
8 Pinout
8.1 K60 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
144 144 Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
QFP BGA
y — L5 NC
NC
— M5 NC
NC
r _{— A10 NC}
NC
— B10 NC
NC
a _{— C10 NC}
NC
1 D3 ADC1_SE4a ADC1_SE4a PTE0
SPI1_PCS1 UART1_TX SDHC0_D1
I2C1_SDA
in ^{2 D2 ADC1_SE5a ADC1_SE5a PTE1}
SPI1_SOUT UART1_RX SDHC0_D0
I2C1_SCL
EzPort
3
4
5
6
7
8
9
10
D1
E4
E5
F6
E3
E2
E1
F4
ADC1_SE6a
ADC1_SE7a
VDD
VSS
DISABLED
DISABLED
DISABLED
DISABLED
ADC1_SE6a
ADC1_SE7a
VDD
VSS
PTE2
SPI1_SCK UART1_CTS SDHC0_DCL
_b
K
PTE3
SPI1_SIN UART1_RTS SDHC0_CMD
_b
lim _PTE4
SPI1_PCS0 UART3_TX SDHC0_D3
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2
e _PTE6
SPI1_PCS3 UART3_CTS I2S0_MCLK
r _b
PTE7
UART3_RTS I2S0_RXD
P ^_b
I2S0_CLKIN
11 F3 DISABLED
PTE8
UART5_TX I2S0_RX_FS
12 F2 DISABLED
PTE9
UART5_RX I2S0_RX_BC
LK
13 F1 DISABLED
PTE10
UART5_CTS I2S0_TXD
_b
14 G4 DISABLED
PTE11
UART5_RTS I2S0_TX_FS
_b
15 G3 DISABLED
PTE12
I2S0_TX_BC
LK
16 E6 VDD
VDD
17 F7 VSS
VSS
18 H3 VSS
VSS
19 H1 USB0_DP USB0_DP
20 H2 USB0_DM USB0_DM
K60 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
61