68HC05J5A Datasheet, PDF(56/106 Page) Freescale Semiconductor, Inc

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68HC05J5A Datasheet, PDF (56/106 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

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Freescale Semiconductor, Inc.

GENERAL RELEASE SPECIFICATION

July 16, 1999

RTIF - Real Time Interrupt Flag

The RTIF is a read-only ï¬ag bit.

1 = Set when the output of the chosen (1 of 4 selections) Real Time

Interrupt stage goes active. A TIMER Interrupt request will be

generated if RTIE is also set.

0 = Reset by writing a logical one to the RTIF acknowledge bit, RTIFR.

Writing to the RTIF ï¬ag bit has no effect on its value. This bit is

cleared by reset.

TOFE - Timer Overï¬ow Enable

The TOFE is an enable bit that allows generation of a TIMER Interrupt upon

overï¬ow of the Timer Counter Register.

1 = When set, the TIMER Interrupt is generated when the TOF ï¬ag bit is

set.

0 = When cleared, no TIMER interrupt caused by TOF bit set will be

generated. This bit is cleared by reset.

RTIE - Real Time Interrupt Enable

The RTIE is an enable bit that allows generation of a TIMER Interrupt by the

RTIF bit.

1 = When set, the TIMER Interrupt is generated when the RTIF ï¬ag bit is

set.

0 = When cleared, no TIMER interrupt caused by RTIF bit set will be

generated. This bit is cleared by reset.

TOFR - Timer Overï¬ow Acknowledge

The TOFR is an acknowledge bit that resets the TOF ï¬ag bit. This bit is unaf-

fected by reset. Reading the TOFR will always return a logical zero.

1 = Clears the TOF ï¬ag bit.

0 = Does not clear the TOF ï¬ag bit.

RTIFR - Real Time Interrupt Acknowledge

The RTIFR is an acknowledge bit that resets the RTIF ï¬ag bit. This bit is unaf-

fected by reset. Reading the RTIFR will always return a logical zero.

1 = Clears the RTIF ï¬ag bit.

0 = Does not clear the RTIF ï¬ag bit.

RT1, RT0 - Real Time Interrupt Rate Select

The RT0 and RT1 control bits select one of four taps for the Real Time Interrupt

circuit. Table 8-1 shows the available interrupt rates for two fop values. Both the

RT0 and RT1 control bits are set by reset, selecting the lowest periodic rate and

therefore the maximum time in which to alter these bits if necessary. Care

should be taken when altering RT0 and RT1 if the time-out period is imminent

or uncertain. If the selected tap is modiï¬ed during a cycle in which the counter

is switching, an RTIF could be missed or an additional one could be generated.

To avoid problems, the COP should be cleared just prior to changing RTI taps.

MULTI-FUNCTION TIMER

MC68HC05J5A

8-4

REV 2.1

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