K30P81M100SF2 Datasheet, PDF (53/59 Pages) Freescale Semiconductor, Inc – K30P81M100SF2

If you want the drawing for this package
80-pin LQFP
81-pin MAPBGA
Then use this document number
98ASS23174W
98ASH98051A
Pinout
8 Pinout
8.1 K30 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
y _{pins on the devices supported by this document. The Port Control Module is responsible}
r ^{for selecting which ALT functionality is available on each pin.}
80 Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
a QFP
1 ADC1_SE4a ADC1_SE4a PTE0
SPI1_PCS1 UART1_TX SDHC0_D1
I2C1_SDA
in ^{2 ADC1_SE5a ADC1_SE5a PTE1}
SPI1_SOUT UART1_RX SDHC0_D0
I2C1_SCL
3 ADC1_SE6a ADC1_SE6a PTE2
SPI1_SCK
UART1_CTS_ SDHC0_DCLK
b
4 ADC1_SE7a ADC1_SE7a PTE3
SPI1_SIN
UART1_RTS_ SDHC0_CMD
b
lim ^{5 DISABLED}
PTE4
SPI1_PCS0 UART3_TX SDHC0_D3
6 DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2
7 VDD
VDD
8 VSS
VSS
e _{9 ADC0_SE4a ADC0_SE4a PTE16}
SPI0_PCS0 UART2_TX FTM_CLKIN0
FTM0_FLT3
10 ADC0_SE5a ADC0_SE5a PTE17
SPI0_SCK UART2_RX FTM_CLKIN1
LPT00_ALT3
Pr ^{11 ADC0_SE6a ADC0_SE6a PTE18}
SPI0_SOUT UART2_CTS_ I2C0_SDA
b
EzPort
12 ADC0_SE7a ADC0_SE7a PTE19
SPI0_SIN UART2_RTS_ I2C0_SCL
b
13 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
14 PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
15 PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
16 PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
17 VDDA
VDDA
18 VREFH
VREFH
K30 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
53