K12P48M50SF4 Datasheet, PDF (50/54 Pages) Freescale Semiconductor, Inc – K12 Sub-Family Data Sheet

Pinout
K12, K21, and K22 devices and are not present on K10 and
K20 devices.
• The TRACE signals on PTE0, PTE1, PTE2, PTE3, and
PTE4 are available only for K11, K12, K21, and K22
devices and are not present on K10 and K20 devices.
• If the VBAT pin is not used, the VBAT pin should be left
floating. Do not connect VBAT pin to VSS.
• The FTM_CLKIN signals on PTB16 and PTB17 are
available only for K11, K12, K21, and K22 devices and is
not present on K10 and K20 devices. For K12D devices
this signal is on ALT7, and for K12F devices, this signal is
on ALT4.
48
Default
LQFP
1 VDD
2 VSS
3 ADC0_SE4a
4 ADC0_SE5a
5 ADC0_SE6a
6 ADC0_SE7a
7 ADC0_DP0
8 ADC0_DM0
9 VDDA
10 VREFH
11 VREFL
12 VSSA
13 VREF_OUT/
CMP1_IN5/
CMP0_IN5
14 XTAL32
15 EXTAL32
16 VBAT
17 JTAG_TCLK/
SWD_CLK/
EZP_CLK
18 JTAG_TDI/
EZP_DI
19 JTAG_TDO/
TRACE_SWO/
EZP_DO
20 JTAG_TMS/
SWD_DIO
21 NMI_b/
EZP_CS_b
22 VDD
ALT0
VDD
VSS
ADC0_SE4a
ADC0_SE5a
ADC0_SE6a
ADC0_SE7a
ADC0_DP0
ADC0_DM0
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5
XTAL32
EXTAL32
VBAT
VDD
ALT1
PTE16
PTE17
PTE18
PTE19
PTA0
PTA1
PTA2
PTA3
PTA4/
LLWU_P3
ALT2
ALT3
ALT4
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
UART2_TX
UART2_RX
UART2_CTS_b
UART2_RTS_b
FTM_CLKIN0
FTM_CLKIN1
I2C0_SDA
I2C0_SCL
UART0_CTS_b/ FTM0_CH5
UART0_COL_b
UART0_RX FTM0_CH6
UART0_TX FTM0_CH7
UART0_RTS_b FTM0_CH0
FTM0_CH1
ALT5
ALT6
ALT7
EzPort
FTM0_FLT3
LPTMR0_ALT3
JTAG_TCLK/
SWD_CLK
EZP_CLK
JTAG_TDI
EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
K12 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
50
Freescale Semiconductor, Inc.