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XPC8240RZU250E Datasheet, PDF (5/8 Pages) Freescale Semiconductor, Inc – Modified voltage specifications to achieve 250 MHz | |||
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Freescale Semiconductor, Inc.
Ordering Information
Table 18. MPC8240 Microprocessor PLL Configurations (continued)
250-MHz Part 8, 9
Ratios 3, 4
Ref.
No.
PLL_
CFG
[0:4] 2
CPU 1
HID1[0:4]
PCI Clock Input
(PCI_SYNC_IN)
Range (MHz)
Peripheral
Logic/Mem
Bus Clock Range
(MHz)
CPU Clock
Range
(MHz)
PCI to Mem
(Mem VCO)
Multiplier
Mem to CPU
(CPU VCO)
Multiplier
5 00101 00110
Bypass
Bypass
2.5 (5)
7 00111 11000
8 01000 11000
33 6â56 5
Bypass
33â56
100â168
Bypass
1 (4)
3 (6)
3 (6)
A 01010 00111
25â27
50â55
225â250
2 (4)
4.5 (9)
C 01100 00110
25â50
50â100
125â250
2 (4)
2.5 (5)
E 01110 11000
25â41
50â83
150â250
2 (4)
3 (6)
10 10000 00100
25â33
75â100
150â200
3 (6)
2 (4)
12 10010 00100
33â66
50â100
100â200
1.5 (3)
2 (4)
14 10100 11110
25â35
50â71
175â250
2 (4)
3.5 (7)
16 10110 11010
25â31
50â62
200â250
2 (4)
4 (8)
18 11000
1A 11010
1C 11100
1D 11101
11000
11010
11000
00110
25â33
50 7â62
33 7â55
33 7â66
62â83
50â62
50â83
50â100
186â250
200â250
150â250
125â250
2.5 (5)
1 (2)
1.5 (3)
1.5 (3)
3 (6)
4 (8)
3 (6)
2.5 (5)
1E 11110
1F 11111
01111
11111
Not usable
Off
Off
Off
Off
Notes:
1. The processor HID1 values only represent the multiplier of the processorâs PLL (memory-to-processor multiplier);
thus, multiple MPC8240 PLL_CFG[0:4] values may have the same processor HID1 value. This implies that system
software cannot read the HID1 register and associate it with a unique PLL_CFG[0:4] value.
2. PLL_CFG[0:4] settings not listed (00110, 01001, 01011, 01101, 01111, 10001, 10011, 10101, 10111, 11001, and
11011) are reserved.
3. In PLL bypass mode, the PCI_SYNC_IN input signal clocks the internal processor directly, the peripheral logic PLL
is disabled, and the bus mode is set for 1:1 (PCI:Mem) mode operation. This mode is intended for hardware modeling
support. The AC timing specifications given in this document do not apply in PLL bypass mode.
4. In clock-off mode, no clocking occurs inside the MPC8240 regardless of the PCI_SYNC_IN input.
5. Limited due to maximum memory VCO = 225 MHz.
6. Limited due to minimum CPU VCO = 200 MHz.
7. Limited due to minimum memory VCO = 100 MHz.
8. For clarity, range values are shown rounded down to the nearest whole number (decimal place accuracy removed).
9. Note that the 250-MHz part is available only in the XPC8240RZUnnnx number series.
1.9 Ordering Information
Ordering information for the parts fully covered by this specification document is provided in Section 1.9.1,
âPart Numbers Fully Addressed by This Document.â
MPC8240 Part Number Specification for the XPC8240RXXnnnx Series
5
For More Information On This Product,
Go to: www.freescale.com
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