56F8013_07 Datasheet, PDF (41/125 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Peripheral Memory Mapped Registers
Table 4-18 GPIOA Registers Address Map
(GPIOA_BASE = $00 F100)
Register Acronym
GPIOA_PUPEN
Address Offset
$0
Register Description
Pull-up Enable Register
GPIOA_DATA
$1
Data Register
GPIOA_DDIR
$2
Data Direction Register
GPIOA_PEREN
$3
Peripheral Enable Register
GPIOA_IASSRT
$4
Interrupt Assert Register
GPIOA_IEN
$5
Interrupt Enable Register
GPIOA_IEPOL
$6
Interrupt Edge Polarity Register
GPIOA_IPEND
$7
Interrupt Pending Register
GPIOA_IEDGE
$8
Interrupt Edge-Sensitive Register
GPIOA_PPOUTM
$9
Push-Pull Output Mode Control Register
GPIOA_RDATA
$A
Raw Data Register
GPIOA_DRIVE
$B
Drive Strength Control Register
Table 4-19 GPIOB Registers Address Map
(GPIOB_BASE = $00 F110)
Register Acronym
Address Offset
Register Description
GPIOB_PUPEN
GPIOB_DATA
GPIOB_DDIR
GPIOB_PEREN
GPIOB_IASSRT
GPIOB_IEN
GPIOB_IEPOL
GPIOB_IPEND
GPIOB_IEDGE
GPIOB_PPOUTM
GPIOB_RDATA
GPIOB_DRIVE
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Edge Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Output Mode Control Register
$A
Raw Data Register
$B
Drive Strength Control Register
56F8013/56F8011 Data Sheet, Rev. 10
Freescale Semiconductor
41
Preliminary