MC44CC375AV Datasheet, PDF (4/16 Pages) Freescale Semiconductor, Inc – PLL Tuned VHF (Channel 3 / 4)Audio / Video Modulator

VIDEO SECTION
The modulator requires a composite video input with neg-
ative going sync pulses and a nominal level of 1.0 V_(pp). This
signal is AC coupled to the video input where the sync tip lev-
el is clamped.
The video modulation depth typical value is given for
1.0 V_CBVS input level. It can be reduced by simply adding a
resistive divider at video input, resulting in a lower signal seen
by the video input stage.
The video signal is then passed to a peak white clip circuit
whose function is to soft clip the top of the video waveform if
the amplitude from the sync tip to peak white goes too high.
In this way, over-modulation of the carrier by the video is
avoided. The clipping function is always engaged.
The clipping happens at 106IRE with 1.0 V_pp video signal
(100IRE = 0.7 V_pp video blank to white).
SOUND SECTION
The PLL multivibrator oscillator is fully integrated.
The sound modulator system consists of an FM modulator
incorporating the sound subcarrier oscillator. The audio input
signal is AC coupled into the amplifier which then drives the
modulator.
The audio pre-emphasis circuit is a high-pass filter with an
external capacitor C1 and an internal resistor (100 kΩ typi-
cal). The recommended capacitor value (750 pF) is for NTSC
standards, time constant is 75 µs.
The audio bandwidth specification is for 50 Hz to 15 KHz
range, with pre-emphasis circuit engaged. Without this pre-
emphasis circuit, it is possible to extend the audio bandwidth
to high frequencies, as there is no internal frequency limita-
tion (stereo application, SAP, etc.).
PLL SECTION — DIVIDERS
The reference divider is a fixed ÷128 resulting in a refer-
ence frequency of 31.25 KHz with a 4.0 MHz crystal. The
31.25 KHz reference frequency is used for both the UHF and
Sound PLLs.
The prescaler is a fixed ÷8 and is permanently engaged.
The VHF divider is also a fixed ÷8.
The programmable divider’s division ratio is controlled by
the CHS pin voltage in order to select channel 3 or channel 4.
PIN SELECTION
Pins CHS and PSAVE are internally pulled up to 3.3 V,
SOC is internally pulled up by 1.8 V. By default (open condi-
tion), all pins are “HI”.
Table 2. Configuration Pin Settings
Pin No Pin Name LO (grounded)
HI*
1
CHS
CH3 - 61.25 MHz CH4 - 67.25 MHz
3
SOC
Sound ON
Sound OFF
16
PSAVE Power Save Mode
Normal Mode
*Please do not pull pin 3 to high voltage. For HI condition, leave pin
3 open.
MC44CC375AV
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