MC33285 Datasheet, PDF (4/5 Pages) Freescale Semiconductor, Inc – Automotive Dual High Side TMOS Driver

MC33285
Freesca_FUl_Ne_CTS_IOe_Nm_NALic_DEo_Sn_CRd_IPu_Tc_IOt_Nor, Inc.
Introduction
The MC33285 contains only one charge pump for two
outputs.The outputs OUT1 and OUT2 are switched on and off
by the input IN .There are three ways to control the outputs:
OUt1 can be switched alone , they can be switched together
or OUT2 can be switched when OUT1 is already on .In the last
case , the voltage drop on OUT1 when charging OUT2 is
limited .
The external capacitor C_CP connected to pin CP is used to
store the charge continuously delivered by the charge pump .
The voltage on this pin is limited to a maximum value V_CPmax .
Both outputs are sourced with a constant current from C_CP to
switch them on . In addition , the gates of the power FETs are
precharged from VCC to prevent C_CP from being discharged
by a voltage on OUT1 or OUT2 which is still lower than
V_VCC.The values of the output voltages are limited to
V_OUT1max and V_OUT2max
The power FET on OUT1 is protected againts an
exceeded gate-source voltage by an internal zener diode.
Channel 1 allows to protect the n-channel power FET on
OUT1 under over current condition. The drain-source voltage
of the FET on OUT1 will be checked, if the channel 1 is
switched on. The internal error voltage threshold determines
the maximum drain-source voltage that allows the power FET
to stay in the on state. If the measured drain-source voltage
exceeds the internal error voltage threshold, the output of the
Over Current Protection Comparator (OCPC) is enabled. If
the output of the OCPC is active longer than t_OCdet , the output
OUT1 is switched off .
After switching off the power FET on OUT1 by an over
current condition, the power FET can only be turned on again
by the input IN.
When switching off the power FETs their gate capacities
are discharged by a constant currennt I_OUToff
IF the input IN is disconnected, the MC33285 outputs
OUT1 and OUT2 are in the off state.
If overvoltage occurs on pin DRN for a time period longer
than t_LDdet , then OUT2 is switched on for the time t_OUT2act. In
overvoltage condition OUT1 is off if IN is below Vih.
Internal Zener Diode
An on-chip zener diode is placed between OUT1 and
SRC. Design guarantees that V_Z > V_TH1
- zener clamping voltage between OUT1 and SRC :
V_TH1 < V_Z < 20V
PWM capability
The CPIC2 is PWM capable on OUT2. The loss of charge
on Ccp when switching on OUT2 is refreshed until the start on
the next PWM cycle to a value which is sufficient to guarantee
the specified turn on behaviour.
The PWM capability is measured with a test circuit and
load conditions
- PWM cycle : period T = 20ms ; OUT2 is switched on from
10% to 90% of T .
- Test condition : V_IN : ramps 2.5V to 5V according to PWM
cycle defined above.
Crosstalk between OUT1 and OUT2
If output OUT2 is switched on while OUT1 is already on,
the voltage drop that occurs on OUT1 is limited.
Voltage drop on OUT1 :
10V < V_VCC < 20V : OUT1 not below V_VCC + 7V
7V < V_VCC < 20V : OUT1 not below V_VCC + 7V
Each time OUT1 is switched on, a current ILCdet is
sourced out of pin SRC for the time tLCdet to check if there is
an external leakage current on that node in the application.
The high side switch on OUT1 is turned on only if the test is
successful."
For More Information On This Product,
MC33285
Go to: ^Mw^Ow^Tw^OR.f^Ore^Le^Ascale.com
4