MCF5271_09 Datasheet, PDF (32/42 Pages) Freescale Semiconductor, Inc – Integrated Microprocessor Hardware Specification

Electrical Characteristics
I2C_SCL
I1
I2
I4
I6
I7
I5
I8
I3
I9
I2C_SDA
Figure 15. I²C Input/Output Timings
7.10 Fast Ethernet AC Timing Specifications
MII signals use TTL signal levels compatible with devices operating at either 5.0 V or 3.3 V.
7.10.1 MII Receive Signal Timing (ERXD[3:0], ERXDV, ERXER, and
ERXCLK)
The receiver functions correctly up to a ERXCLK maximum frequency of 25 MHz +1%. The processor
clock frequency must exceed twice the ERXCLK frequency.
Table 18 lists MII receive channel timings.
Table 18. MII Receive Signal Timing
Num
M1
M2
M3
M4
Characteristic
ERXD[3:0], ERXDV, ERXER to ERXCLK setup
ERXCLK to ERXD[3:0], ERXDV, ERXER hold
ERXCLK pulse width high
ERXCLK pulse width low
Min
5
5
35%
35%
Max
—
—
65%
65%
Unit
ns
ns
ERXCLK period
ERXCLK period
Figure 16 shows MII receive signal timings listed in Table 18.
M3
ERXCLK (input)
ERXD[3:0] (inputs)
ERXDV
ERXER
M4
M1
M2
Figure 16. MII Receive Signal Timing Diagram
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4
32
Freescale Semiconductor