MC56F84442VLH Datasheet, PDF (30/67 Pages) Freescale Semiconductor, Inc – MC56F844xx Advance Information

General
Mode
LPSTOP
(LsSTOP)
VLPRUN
VLPWAIT
VLPSTOP
Table 9. Current Consumption (continued)
Maximum Conditions
Frequency
2 MHz
200 kHz
200 kHz
200 kHz
• 200 kHz Device Clock from Relaxation Oscillator
(ROSC)
• ROSC in standby mode
• Regulators are in standby
• PLL disabled
• Only PITs and COP enabled; other peripheral
modules disabled and clocks gated off³
• Processor core in stop mode
• 32 kHz Device Clock
• Clocked by a 32 kHz external clock source
• Oscillator in power down
• All ROSCs disabled
• Large regulator is in standby
• Small regulator is disabled
• PLL disabled
• Repeat NOP instructions
• All peripheral modules, except COP and EWM,
disabled and clocks gated off
• Simple loop running from platform instruction
buffer
• 32 kHz Device Clock
• Clocked by a 32 kHz external clock source
• Oscillator in power down
• All ROSCs disabled
• Large regulator is in standby
• Small regulator is disabled
• PLL disabled
• All peripheral modules, except COP, disabled and
clocks gated off
• Processor core in wait mode
• 32 kHz Device Clock
• Clocked by a 32 kHz external clock source
• Oscillator in power down
• All ROSCs disabled
• Large regulator is in standby
• Small regulator is disabled
• PLL disabled
• All peripheral modules, except COP, disabled and
clocks gated off
• Processor core in stop mode
Typical at 3.3 V,
25°C
I_DD1
I_DDA
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Maximum at 3.6
V, 105°C
I_DD1
I_DDA
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
1. No output switching, all ports configured as inputs, all inputs low, no DC loads
2. ADC power consumption at higher frequency can be found in Table 26
3. In all chip LP modes and flash memory VLP modes, the maximum frequency for flash memory operation is 500 kHz due to
the fixed frequency ratio of 1:4 between the CPU clock and the flash clock.
MC56F844xx Advance Information Data Sheet, Rev. 2, 06/2012.
30
Preliminary
Freescale Semiconductor, Inc.
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