MC9S12XS128MAL Datasheet, PDF (276/738 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Analog-to-Digital Converter (ADC12B16CV1)
Address Name
Bit 7
R
0x0000 ATDCTL0
Reserved
W
R
0x0001 ATDCTL1
ETRIGSEL
W
0x0002 ATDCTL2 ^R
0
W
R
0x0003 ATDCTL3
W
DJM
R
0x0004 ATDCTL4 _W SMP2
R
0
0x0005 ATDCTL5
W
R
0x0006 ATDSTAT0
W
SCF
0x0007
Unimple- R
mented W
0
R
0x0008 ATDCMPEH
W
R
0x0009 ATDCMPEL
W
R
0x000A ATDSTAT2H
W
0x000B ATDSTAT2L ^R
W
R
0x000C ATDDIENH
W
R
0x000D ATDDIENL _W
R
0x000E ATDCMPHTH
W
R
0x000F ATDCMPHTL
W
0x0010
R
ATDDR0
W
0x0012
R
ATDDR1
W
0x0014
R
ATDDR2
W
0x0016
R
ATDDR3
W
0x0018
ATDDR4 ^R
W
0x001A
R
ATDDR5
W
0x001C
R
ATDDR6 _W
6
5
4
3
2
1
Bit 0
0
0
0
WRAP3 WRAP2 WRAP1 WRAP0
SRES1 SRES0 SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
AFFC ICLKSTP ETRIGLE ETRIGP ETRIGE ASCIE ACMPIE
S8C
S4C
S2C
S1C
FIFO
FRZ1
FRZ0
SMP1 SMP0
PRS[4:0]
SC
SCAN MULT
CD
0
CC3
ETORF FIFOR
0
0
0
0
CC
CC2
0
CB
CC1
0
CA
CC0
0
CMPE[15:8]
CMPE[7:0]
CCF[15:8]
CCF[7:0]
IEN[15:8]
IEN[7:0]
CMPHT[15:8]
CMPHT[7:0]
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
= Unimplemented or Reserved
Figure 10-3. ADC12B16C Register Summary (Sheet 1 of 2)
S12XS Family Reference Manual, Rev. 1.13
276
Freescale Semiconductor