MKL25Z32VFM4 Datasheet, PDF (25/53 Pages) Freescale Semiconductor, Inc – Part numbers for the chip have fields that identify the specific part.

Peripheral operating requirements and behaviors
6.2 System modules
There are no specifications necessary for the device's system modules.
6.3 Clock modules
6.3.1 MCG specifications
Table 12. MCG specifications
Symbol Description
Min.
Typ.
f_{ints_ft}
f_{ints_t}
Internal reference frequency (slow clock) —
factory trimmed at nominal V_DD and 25 °C
Internal reference frequency (slow clock) — user
trimmed
—
31.25
32.768
—
Δ_{fdco_res_t} Resolution of trimmed average DCO output
—
± 0.3
frequency at fixed voltage and temperature —
using SCTRIM and SCFTRIM
Δf_{dco_t} Total deviation of trimmed average DCO output
frequency over voltage and temperature
—
+0.5/-0.7
Δf_{dco_t} Total deviation of trimmed average DCO output
—
frequency over fixed voltage and temperature
range of 0 - 70 °C
± 0.4
f_{intf_ft}
Δf_{intf_ft}
f_{intf_t}
f_{loc_low}
f_{loc_high}
Internal reference frequency (fast clock) —
—
factory trimmed at nominal V_DD and 25 °C
Frequency deviation of internal reference clock
—
(fast clock) over temperature and voltage ---
factory trimmed at nominal V_DD and 25 °C
Internal reference frequency (fast clock) — user
3
trimmed at nominal V_DD and 25 °C
Loss of external clock minimum frequency —
RANGE = 00
(3/5) x
f_{ints_t}
Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
(16/5) x
f_{ints_t}
FLL
4
+1/-2
—
—
—
f_{fll_ref}
f_dco
FLL reference frequency range
DCO output
frequency range
Low range (DRS = 00)
640 × f_{fll_ref}
Mid range (DRS = 01)
31.25
20
40
—
20.97
41.94
1280 × f_{fll_ref}
Table continues on the next page...
Max.
—
39.0625
± 0.6
±3
± 1.5
—
±3
5
—
—
39.0625
25
48
Unit
kHz
kHz
%f_dco
%f_dco
%f_dco
MHz
%f_{intf_ft}
MHz
kHz
kHz
kHz
MHz
MHz
Notes
1
1, 2
1, 2
2
3, 4
KL25 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
25