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MSC8256_11 Datasheet, PDF (23/68 Pages) Freescale Semiconductor, Inc – Six-Core Digital Signal Processor
Electrical Characteristics
2 Electrical Characteristics
This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing
specifications. For additional information, see the MSC8256 Reference Manual.
2.1 Maximum Ratings
In calculating timing requirements, adding a maximum value of one specification to a minimum value of another specification
does not yield a reasonable sum. A maximum specification is calculated using a worst case variation of process parameter values
in one direction. The minimum specification is calculated using the worst case for the same parameters in the opposite direction.
Therefore, a “maximum” value for a specification never occurs in the same device with a “minimum” value for another
specification; adding a maximum to a minimum represents a condition that can never exist.
Table 2 describes the maximum electrical ratings for the MSC8256.
Table 2. Absolute Maximum Ratings
Rating
Core supply voltage
• Cores 0–5
PLL supply voltage3
M3 memory supply voltage
DDR memory supply voltage
• DDR2 mode
• DDR3 mode
Power Rail Name
VDD
M3VDD
GVDD1, GVDD2
Symbol
VDD
VDDPLL0
VDDPLL1
VDDPLL2
VDDM3
VDDDDR
Value
–0.3 to 1.1
–0.3 to 1.1
–0.3 to 1.1
–0.3 to 1.1
–0.3 to 1.1
–0.3 to 1.98
–0.3 to 1.65
Unit
V
V
V
V
V
V
V
DDR reference voltage
MVREF
MVREF
–0.3 to 0.51 × VDDDDR
V
Input DDR voltage
VINDDR
–0.3 to VDDDDR + 0.3
V
I/O voltage excluding DDR and RapidIO lines
NVDD, QVDD
VDDIO
–0.3 to 2.625
V
Input I/O voltage
RapidIO pad voltage
Rapid I/O core voltage
VINIO
–0.3 to VDDIO + 0.3
V
SXPVDD1,
VDDSXP
–0.3 to 1.26
V
SXPVDD2
SXCVDD1,
VDDSXC
–0.3 to 1.21
V
SXCVDD2
Rapid I/O PLL voltage3
VDDRIOPLL
–0.3 to 1.21
V
Input RapidIO I/O voltage
VINRIO
–0.3 to VDDSXC + 0.3
V
Operating temperature
TJ
–40 to 105
°C
Storage temperature range
TSTG
–55 to +150
°C
Notes: 1. Functional operating conditions are given in Table 3.
2. Absolute maximum ratings are stress ratings only, and functional operation at the maximum is not guaranteed. Stress beyond
the listed limits may affect device reliability or cause permanent damage.
3. PLL supply voltage is specified at input of the filter and not at pin of the MSC8256 (see Figure 37 and Figure 38)
MSC8256 Six-Core Digital Signal Processor Data Sheet, Rev. 5
Freescale Semiconductor
23