68HC708KL8 Datasheet, PDF (206/246 Pages) Freescale Semiconductor, Inc – Microcontrollers

Computer Operating Properly (COP)
13.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 13.5 COP
Control Register) clears the COP counter and clears bits 12 through 4
of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
13.4.4 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the COP prescaler
4096 OSCXCLK cycles after power-up.
13.4.5 Internal Reset
An internal reset clears the SIM counter and the COP counter.
13.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
13.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). (See Section 5. Configuration
Register (CONFIG).)
13.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register (CONFIG).
General Release Specification
206
Computer Operating Properly (COP)
MC68HC708KL8 — Rev. 2.1
Freescale Semiconductor