MC1323X Datasheet, PDF (20/36 Pages) Freescale Semiconductor, Inc – Low Cost SoC Remote Control Platform for the 2.4 GHz IEEE®

11 Electrical Specifications
This section details maximum ratings for the 48-pin LGA package, recommended operating conditions,
DC characteristics, and AC characteristics.
11.1 Package Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maximum rating is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this section.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, either V_SS or V_BATT) or the
programmable pull-up resistor associated with the pin is enabled.
Table 3 shows the maximum ratings for the 48-Pin LGA package.
Table 3. LGA Package Maximum Ratings
Rating
Symbol
Maximum Junction Temperature
T_J
Storage Temperature Range
T_stg
Moisture Sensitivity Level
Reflow Soldering Temperature
Power Supply Voltage
Digital Input Voltage
V_BATT
Vin
RF Input Power
P_max
Note: Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the limits in the Electrical Characteristics
or Recommended Operating Conditions tables.
Note: Meets ESD Human Body Model (HBM) = 2 kV
Value
125
125
MSL3-260
260
-0.3 to 3.7
-0.3 to (V_DD + 0.3)
10
Unit
°C
°C
°C
Vdc
Vdc
dBm
11.2 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with the JESD22 Stress Test Qualification for Commercial Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
MC1323x Advance Information, Rev. 1.2
20
Freescale Semiconductor