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MC9RS08KA84FS Datasheet, PDF (2/2 Pages) Freescale Semiconductor, Inc – 8-bit Microcontrollers
Features
8-bit RS08 Central Processor Unit (CPU)
• Up to 10 MHz (bus frequency) RS08 CPU at 1.8 volts for 100 ns minimum instruction time
• Subset of HC08 instruction set with added BGND instruction
• Supports tiny/short address mode
• Index addressing scheme through memory mapped registers X and D[X] within the tiny address range
• 14 byte code-efficient RAM
• X and D[X] mapped within code-efficient tiny address space
• 16 byte code-efficient peripheral register space
• Page window
• Simplified interrupt mechanism
• Subroutine call/return mechanism
Integrated Third-Generation Flash
• Extremely fast, byte-writable programming— up to 20 µs/byte
• Offers 1 KB write/erase cycles minimum over temperature
Flexible Clock Options
• Internal clock source module containing a frequency-locked loop (FLL) controlled by internal or
external reference
• Precision trimming of internal reference allows typical 0.2 percent resolution and +1 percent to -1 percent
deviation over operating temperature and voltage
• Internal reference clock can be trimmed from 31.25 kHz to 39.065 kHz, allowing for maxim 10 MHz Bus
frequency output
Timer
• 2 x 8-bit modulo timer with 8-bit prescaler
• 2-ch., 16-bit timer/PWM
• Allows external timer clock source
ADC
• 12-ch., 10-bit resolution
• 2.5 μs conversion time; automatic compare function
• Trigger conversion using RTI counter
Analog Comparator
• Option to compare to internal reference
• Option to route comparator output directly to pin
• Allows operation in MCU STOP mode
I2C
• Inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading
Real-Time Interrupt
• Real-time interrupt trigger with 3-bit prescaler
• Built-in low-power 1 kHz clock source
Up to 18 GPIOs Including One Output-Only and One Input-Only Pin
• Software selectable pull-ups on ports when used as input (internal pull-up on RESET)
• Software selectable slew rate control on ports when used on output
• 8-pin keyboard interrupt module with software selectable polarity on edge or edge/level modes
System Protection
• Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock
source or bus clock
• Low voltage detection with reset or interrupt
• Illegal opcode and illegal address detection with reset
• Security feature for flash
Background Debugging System
• On-chip BDM
Package
• Pin-compatible with SH, QG family
Benefits
• Offers high performance for applications operated by battery—even at low voltage
• Provides source code compatibility with 68HC05/68HC08/S08
• Allows easier code debugging through additional BGND instruction
• Offers direct access to the shadow PC register through additional SHA and SLA instructions
• Allows single-byte instructions for the most frequently used operations, including INC, DEC, ADD, SUB, LDA, STA and CLR
• Offers optimized coding efficiency and code density
• Allows emulation for HC08/S08-style zero-offset index addressing mode instructions
• Performs index addressing through X and D[X] registers with all direct, tiny and short addressing instructions capable of operating
on/with X and D[X] registers
• Extends addressing to the entire memory space through the paging scheme
• Enables direct access to the code-efficient RAM through single-byte tiny/short address mode instructions
• Provides code-efficient access to most frequently accessed peripherals within the short addressing space
• Enables most frequently used variables and software flags to optimize coding efficiency
• Provides access to entire 8K through 128 pages of 64 bytes
• Helps eliminate hardware overhead for the vector lookup and the stacking mechanism
• Provides short wake-up latency for WAIT/STOP
• SHA/SLA instructions enable multi-level software stacking implementation
• Allows single level of subroutine call through hardware stacking with a shadow PC register
• Allows fast jump to subroutine (JSR/BSR) and return from subroutine (RTS) operation
• Helps reduce production programming costs through ultra fast programming
• Helps lower system power consumption from shorter writes
• Allows electrically erasable nonvolatile memory to help reduce firmware development cycle
• Helps eliminate the cost of all external clock components
• Reduces board space
• Increases system reliability
• Provides more options to use internal or external reference clock
• Provides one of the most accurate internal clock sources on the market for the money
• Allows for trimming to adjust bus clock in specific applications
• Generates periodic trigger for time-based software loops using timer overflow interrupt
• Provide selectable input capture, output compare or buffered edge or center-aligned PWM on each channel
• Utilizes TCLK input as event trigger; the timer can be used as an 8-bit event counter
• Easily interface to analog inputs
• 400 sample/second conversion rate allows for sampling high-speed signals
• Used to set conversion complete and generate interrupt only when result matches condition, freeing up system resources
• Takes periodic measurements without CPU involvement
• Can be used in STOP3 with compare function to take measurements and wake MCU only when compare value is reached
• Requires only a single pin for input signal
• Allows other components in system to see result of comparator with minimal delay
• Offers function to wake up the MCU from WAIT/STOP
• Provide communication interface
• Extend more peripheral
• Allows periodic wake-up or software trigger with delay ranging from 8 ms to 1.024s
• Options to use low-power 1 kHz internal clock to drive the RTI
• Minimizes power consumption in MCU STOP
• Eliminates need for external resistors to help reduce customer system cost
• Configures ports for slower slew rate to help minimize noise emissions from the MCU
• Helps to virtually eliminate external glue logic when interfacing to simple keypads using keyboard scan with programmable pull-
up/pull-down functionality
• Resets device in instance of runaway or corrupted code
• Helps protect in case of clock loss with independent clock source
• Allows system to write/save important variables before voltage drops to low
• Holds devices in reset until reliable voltage levels are reapplied to the part
• Resets device in instance of runaway or corrupted code
• Helps prevent unauthorized access to memory to protect valuable software intellectual property
• Provides single-wire debugging and emulation interface
• Eliminates need for expensive emulation tools
• Provides circuit emulation without the need for additional, expensive development hardware
• Easy migration within Freescale Controller Continuum MCU family
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Document Number: MC9RS08KA8/4FS
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