908E626 Datasheet, PDF (18/38 Pages) Freescale Semiconductor, Inc – Integrated Stepper Motor Driver with Embedded MCU and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
OCF — OVERCURRENT FLAG BIT
This read-only flag is set on an overcurrent condition.
Reset clears the OCF bit. To clear this flag, write a logic [1] to
the appropriate overcurrent flag in the SYSSTAT Register.
See Figure 8, which shows the two signals triggering the
OCF.
• 1 = High-current condition has occurred.
• 0 = High-current condition has not occurred.
HVDD_OCF
HB_OCF
OCF
Figure 8. Principal Implementation for OCF
INTERRUPT MASK REGISTER (IMR)
Register Name and Address: IMR - $04
Bit7 6
5
4
3
2
1 Bit0
Read
0
Write
0
0 LINIE HTIE LVIE HVIE OCIE
Reset 0
0
0
0
0
0
0
0
LINIE — LIN LINE INTERRUPT ENABLE BIT
This read / write bit enables CPU interrupts by the LIN flag,
LINF. Reset clears the LINIE bit.
• 1 = Interrupt requests from LINF flag enabled.
• 0 = Interrupt requests from LINF flag disabled.
HTIE — HIGH-TEMPERATURE INTERRUPT
ENABLE BIT
This read / write bit enables CPU interrupts by the high-
temperature flag, HTF. Reset clears the HTIE bit.
• 1 = Interrupt requests from HTF flag enabled.
• 0 = Interrupt requests from HTF flag disabled.
LVIE — LOW-VOLTAGE INTERRUPT ENABLE BIT
This read / write bit enables CPU interrupts by the low-
voltage flag, LVF. Reset clears the LVIE bit.
• 1 = Interrupt requests from LVF flag enabled.
• 0 = Interrupt requests from LVF flag disabled.
HVIE — HIGH-VOLTAGE INTERRUPT ENABLE BIT
This read / write bit enables CPU interrupts by the high-
voltage flag, HVF. Reset clears the HVIE bit.
• 1 = Interrupt requests from HVF flag enabled.
• 0 = Interrupt requests from HVF flag disabled.
OCIE — Overcurrent Interrupt Enable Bit
This read / write bit enables CPU interrupts by the
overcurrent flag, OCF. Reset clears the OCIE bit.
• 1 = Interrupt requests from OCF flag enabled.
• 0 = Interrupt requests from OCF flag disabled.
RESET
The 908E626 chip has four internal reset sources and one
external reset source, as explained in the paragraphs below.
Figure 9 depicts the internal reset sources.
SPI REGISTERS
VDD
RST_A
AWDRE Flag
HVRE Flag
HTRE Flag
AWD Reset
Sensor
High-Voltage
Reset Sensor
High-Temperature
Reset Sensor
908E626
18
Low-Voltage Reset
MONO
FLOP
Figure 9. Internal Reset Routing
Analog Integrated Circuit Device Data
Freescale Semiconductor