MCF5480 Datasheet, PDF (17/28 Pages) Freescale Semiconductor, Inc – Microprocessor Electrical Characteristics

SDCLK0
SDCLK1
DD1
DD2
DD3
PCI Bus
SDCLK0
SDCLK1
SDCSn,SDWE,
RAS, CAS
SDADDR,
SDBA[1:0]
SDDQS
SDDATA
SDDQS
SDDATA
DD5
CL=2
CMD
DD4
CL=2.5
ROW
COL
DQS Read
DD9
DQS Read
Preamble
Postamble
DD10
WD1 WD2 WD3 WD4
DQS Read
DQS Read
Preamble
Postamble
WD1 WD2 WD3 WD4
Figure 13. DDR Read Timing
10 PCI Bus
The PCI bus on the MCF548x is PCI 2.2 compliant. The following timing numbers are mostly from the
PCI 2.2 spec. Please refer to the PCI 2.2 spec for a more detailed timing analysis.
Table 14. PCI Timing Specifications
Num
Characteristic
Min Max
Frequency of Operation
25
66
P1 Clock Period (t_CK)
15.15 33.33
P2 Address, Data, and Command (33< PCI ≤ 66 Mhz)—Input Setup (t_IS) 3.0
—
P3 Address, Data, and Command (0 < PCI ≤ 33 Mhz)—Input Setup (t_IS) 7.0
—
P4 Address, Data, and Command (33-66 Mhz) - Output Valid (t_DV)
—
6.0
P5 Address, Data, and Command (0 -33 Mhz) - Output Valid (t_DV)
— 11.0
Unit
MHz
ns
ns
ns
ns
ns
Notes
1
2
3
MCF548x Integrated Microprocessor Electrical Characteristics, Rev. 2.1
Freescale Semiconductor
17