MCF5253 Datasheet, PDF (17/32 Pages) Freescale Semiconductor, Inc – ColdFire® Microprocessor Data Sheet

TCK
J1
J2A
TDI, TMS
J4 J5
J3A
J2B
Boundary Scan
Data Input
TRST
TDO
J6 J7
J1
J9
J10
J11
J12
Boundary Scan
Data Output
Figure 4. JTAG Timing Diagram
Table 15. JTAG Timing Parameters
ID
Characteristic
–
TCK Frequency of Operation
J1 TCK Cycle Time
J2A TCK Clock Pulse High Width
J2B TCK Clock Pulse Low Width
J3A TCK Fall Time (V_IH=2.4 V to V_IL=0.5 V)
J3B TCK Rise Time (V_IL=0.5 v to V_IH=2.4 V)
J4 TDI, TMS to TCK rising (Input Setup)
J5 TCK rising to TDI, TMS Invalid (Hold)
J6 Boundary Scan Data Valid to TCK (Setup)
J7 TCK to Boundary Scan Data Invalid to rising edge (Hold)
J8 TRST Pulse Width (asynchronous to clock edges)
J9 TCK falling to TDO Valid (signal from driven or three-state)
J10 TCK falling to TDO High Impedance
Electrical Specifications
J3B
Min Max
0
10
100
—
25
—
25
—
—
5
—
5
8
—
10
—
1
—
10
—
12
—
—
15
2
15
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MCF5253 ColdFire Processor Data Sheet: Technical Data, Rev. 2
Freescale Semiconductor
17