MC15XS3400 Datasheet, PDF (17/49 Pages) Freescale Semiconductor, Inc – Quad High Side Switch (Quad 15mΩ)

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 6.0V ≤ V_PWR ≤ 20V, 3.0V ≤ V_DD ≤ 5.5V, - 40°C ≤ T_A ≤ 125°C, GND = 0V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at T_A = 25°C under nominal conditions, unless
otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SPI INTERFACE CHARACTERISTICS⁽³⁴⁾
Maximum Frequency of SPI Operation
Required Low State Duration for RST⁽³⁵⁾
Rising Edge of CS to Falling Edge of CS (Required Setup Time)⁽³⁶⁾
Rising Edge of RST to Falling Edge of CS (Required Setup Time)⁽³⁶⁾
Falling Edge of CS to Rising Edge of SCLK (Required Setup Time)⁽³⁶⁾
Required High State Duration of SCLK (Required Setup Time)⁽³⁶⁾
Required Low State Duration of SCLK (Required Setup Time)⁽³⁶⁾
Falling Edge of SCLK to Rising Edge of CS (Required Setup Time)⁽³⁶⁾
SI to Falling Edge of SCLK (Required Setup Time)⁽³⁷⁾
Falling Edge of SCLK to SI (Required Setup Time)⁽³⁷⁾
SO Rise Time
C_L = 80pF
f _SPI
–
t _WRST
10
t _CS
–
t _ENBL
–
t _LEAD
–
t _WSCLKh
–
t _WSCLKl
–
t _LAG
–
t _{SI (SU)}
–
t _{SI (HOLD)}
–
t _RSO
–
–
8.0
MHz
–
–
μs
–
1.0
μs
–
5.0
μs
–
500
ns
–
50
ns
–
50
ns
–
60
ns
–
37
ns
–
49
ns
ns
–
13
SO Fall Time
C_L = 80pF
t _FSO
–
ns
–
13
SI, CS, SCLK, Incoming Signal Rise Time⁽³⁷⁾
SI, CS, SCLK, Incoming Signal Fall Time⁽³⁷⁾
Time from Rising Edge of SCLK to SO Low-impedance⁽³⁸⁾
Time from Rising Edge of SCLK to SO High-impedance⁽³⁹⁾
t _RSI
–
t _FSI
–
t _SO(EN)
–
t _SO(DIS)
–
–
13
ns
–
13
ns
–
60
ns
–
60
ns
Notes
34. Parameters guaranteed by design.
35. RST low duration measured with outputs enabled and going to OFF or disabled condition.
36. Maximum setup time required for the 15XS3400 is the minimum guaranteed time needed from the microcontroller.
37. Rise and Fall time of incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
38. Time required for output status data to be available for use at SO. 1.0kΩ on pull-up on CS.
39. Time required for output status data to be terminated at SO. 1.0kΩ on pull-up on CS.
Analog Integrated Circuit Device Data
Freescale Semiconductor
15XS3400
17