MC13783VK Datasheet, PDF (17/50 Pages) Freescale Semiconductor, Inc – Power Management and Audio Circuit

4 Functional Description
Functional Description
4.1 Logic
The logic portions of the MC13783 includes the following:
• Section 4.1.1, “Programmability,” on page 17 includes a description of the dual SPI interface.
• Section 4.1.2, “Clock Generation and Real Time Clock,” on page 21 includes a description of the
32.768 kHz real time clock generation.
• Section 4.1.3, “Power Control System,” on page 22 describes the power control logic, including
interface and operated modes.
4.1.1 Programmability
4.1.1.1 SPI Interface
The MC13783 IC contains two SPI interface ports which allow parallel access by both the call processor
and the applications processor to the MC13783 register set. Via these registers the MC13783 resources can
be controlled. The registers also provide status information about how the MC13783 IC is operating as
well as information on external signals. The SPI interface is comprised of the signals listed below.
Table 4. SPI Interface Pin Description
SPI Bus
PRICLK
PRIMOSI
PRIMISO
PRICS
SECCLK
SECMOSI
SECMISO
SECCS
Interrupt
PRIINT
SECINT
Supply
PRIVCC
SECVCC
Description
Primary processor clock input line, data shifting occurs at the rising edge.
Primary processor serial data input line.
Primary processor serial data output line.
Primary processor clock enable line, active high.
Secondary processor clock input line, data shifting occurs at the rising edge.
Secondary processor serial data input line.
Secondary processor serial data output line.
Secondary processor clock enable line, active high.
Primary processor interrupt.
Secondary processor interrupt.
Primary processor SPI bus supply.
Secondary processor SPI bus supply
Both SPI ports are configured to utilize 32-bit serial data words, using 1 read/write bit, 6 address bits, 1
null bit, and 24 data bits. The SPI ports’ 64 registers correspond to the 6 address bits.
MC13783 Technical Data, Rev. 3.5
Freescale Semiconductor
17