56F8356_07 Datasheet, PDF (159/178 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Serial Communication Interface (SCI) Timing
10.13 Serial Communication Interface (SCI) Timing
Table 10-21 SCI Timing¹
Characteristic
Symbol
Min
Max
Unit
See Figure
Baud Rate²
BR
—
(f_MAX/16)
Mbps
—
RXD³ Pulse Width
RXD_PW
0.965/BR
1.04/BR
ns
10-16
TXD⁴ Pulse Width
TXD_PW
0.965/BR
1.04/BR
ns
10-17
1. Parameters listed are guaranteed by design.
2. f_MAX is the frequency of operation of the system clock, ZCLK, in MHz, which is 60MHz for the 56F8356 device and
40MHz for the 56F8156 device.
3. The RXD pin in SCI0 is named RXD0 and the RXD pin in SCI1 is named RXD1.
4. The TXD pin in SCI0 is named TXD0 and the TXD pin in SCI1 is named TXD1.
RXD
SCI receive
data pin
(Input)
RXD_PW
Figure 10-16 RXD Pulse Width
TXD
SCI receive
data pin
(Input)
TXD_PW
Figure 10-17 TXD Pulse Width
10.14 Controller Area Network (CAN) Timing
Note: CAN is NOT available in the 56F8156 device.
Table 10-22 CAN Timing¹
Characteristic
Symbol
Min
Baud Rate
BR_CAN
—
Bus Wake Up detection
T _WAKEUP
5
1. Parameters listed are guaranteed by design
Max
1
—
Unit
Mbps
μs
See Figure
—
10-18
56F8356 Technical Data, Rev. 13
Freescale Semiconductor
159
Preliminary