68HC08PT48 Datasheet, PDF (141/352 Pages) Freescale Semiconductor, Inc – Advance Information

Advance Information — MC68HC(9)08PT48
Section 8. Random-Access Memory (RAM)
8.1 Contents
8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
8.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
8.2 Introduction
This section describes the 2.5 Kbytes of RAM.
8.3 Functional Description
Addresses $0050 through $0A4F are RAM locations. The location of the
stack RAM is programmable. The 16-bit stack pointer allows the stack to
be anywhere in the 64-Kbyte memory space.
NOTE: For correct operation, the stack pointer must point only to RAM
locations.
Within page zero are 176 bytes of RAM. Because the location of the
stack RAM is programmable, all page zero RAM locations can be used
for I/O (input/output) control and user data or code. When the stack
pointer is moved from its reset location at $00FF, direct addressing
mode instructions can access efficiently all page zero RAM locations.
Page zero RAM, therefore, provides ideal locations for frequently
accessed global variables.
Before processing an interrupt, the CPU uses 5 bytes of the stack to
save the contents of the CPU registers.
NOTE: For M6805 compatibility, the H register is not stacked.
MC68HC(9)08PT48 — Rev. 2.0
MOTOROLA
Random-Access Memory (RAM)
Advance Information
141