MC13192_07 Datasheet, PDF (14/24 Pages) Freescale Semiconductor, Inc – 2.4 GHz Low Power Transceiver for the IEEE® 802.15.4 Standard

Pin Connections
7 Pin Connections
Table 8. Pin Function Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Pin Name
Type
Description
Functionality
RFIN-
RFIN+
Not Used
Not Used
PAO+
PAO-
SM
GPIO4¹
GPIO3¹
GPIO2¹
GPIO1¹
RST
RXTXEN²
ATTN²
CLKO
SPICLK²
MOSI²
MISO³
CE²
RF Input
LNA negative differential input.
RF Input
LNA positive differential input.
Tie to Ground.
Tie to Ground.
RF Output /DC Input Power Amplifier Positive Output. Open drain. Connect
to V_DDA.
RF Output/DC Input Power Amplifier Negative Output. Open drain.
Connect to V_DDA.
Test mode pin. Tie to Ground
Tie to Ground for
normal operation
Digital Input/ Output General Purpose Input/Output 4.
See Footnote 1
Digital Input/ Output General Purpose Input/Output 3.
See Footnote 1
Digital Input/ Output
General Purpose Input/Output 2. When gpio_alt_en,
Register 9, Bit 7 = 1, GPIO2 functions as a “CRC
Valid” indicator.
See Footnote 1
Digital Input/ Output
General Purpose Input/Output 1. When gpio_alt_en,
Register 9, Bit 7 = 1, GPIO1 functions as an “Out of
Idle” indicator.
See Footnote 1
Digital Input
Active Low Reset. While held low, the IC is in Off Mode
and all internal information is lost from RAM and SPI
registers. When high, IC goes to IDLE Mode, with SPI
in default state.
Digital Input
Active High. Low to high transition initiates RX or TX
sequence depending on SPI setting. Should be taken
high after SPI programming to start RX or TX
sequence and should be held high through the
sequence. After sequence is complete, return
RXTXEN to low. When held low, forces Idle Mode.
See Footnote 2
Digital Input
Active Low Attention. Transitions IC from either
Hibernate or Doze Modes to Idle.
See Footnote 2
Digital Output
Clock output to host MCU. Programmable frequencies
of:
16 MHz, 8 MHz, 4 MHz, 2 MHz, 1 MHz, 62.5 kHz,
32.786+ kHz (default),
and 16.393+ kHz.
Digital Clock Input External clock input for the SPI interface.
See Footnote 2
Digital Input
Master Out/Slave In. Dedicated SPI data input.
See Footnote 2
Digital Output
Master In/Slave Out. Dedicated SPI data output.
See Footnote 3
Digital Input
Active Low Chip Enable. Enables SPI transfers.
See Footnote 2
MC13192 Technical Data, Rev. 3.2
14
Freescale Semiconductor