MFR4300 Datasheet, PDF (137/266 Pages) Freescale Semiconductor, Inc – FlexRay Communication Controllers

FlexRay Module (FLEXRAYV2)
A receive FIFO consists of a set of physical message buffers in the FRM and a set of receive FIFO control
registers located in dedicated registers. The structure of a receive FIFO is given in Figure 3-100.
The connection between the receive FIFO control registers and the set of physical message buffers is
established by the start index field SIDX in the Receive FIFO Start Index Register (RFSIR), the FIFO
depth field FIFO_DEPTH in the Receive FIFO Depth and Size Register (RFDSR), and the read index field
RDIDX Receive FIFO A Read Index Register (RFARIR) / Receive FIFO B Read Index Register
(RFBRIR). The start address SADR_MBHF_1 of the first message buffer header field that belongs to the
receive FIFO in the FRM is determined according to Equation 3-4.
SADR_MBHF_1 = (RFSIR.SIDX * 10) + 0x800
Eqn. 3-4
The start address SADR_MBHF_n of the last message buffer header field that belongs to the receive FIFO
in the FRM is determined according to Equation 3-5.
SADR_MBHF_n = ((RFSIR.SIDX+RFDSR.FIFO_DEPTH) * 10) + 0x800
NOTE
All message buffer header fields assigned to a receive FIFO must be a
contiguous region.
Eqn. 3-5
MFR4300 Data Sheet, Rev. 1
Freescale Semiconductor
137