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MC68332 Datasheet, PDF (13/88 Pages) Freescale Semiconductor, Inc – 32-Bit Modular Microcontroller
Freescale Semiconductor, Inc.
Table 5 MCU Signal Characteristics (Continued)
Signal Name
TSC
TXD
XFC
XTAL
MCU Module
SIM
QSM
SIM
SIM
Signal Type
Input
Output
Input
Output
2.5 Signal Function
Active State
—
—
—
—
Signal Name
Address Bus
Address Strobe
Autovector
Bus Error
Bus Grant
Bus Grant Acknowledge
Breakpoint
Bus Request
System Clockout
Chip Selects
Boot Chip Select
Data Bus
Data Strobe
Data and Size Acknowledge
Development Serial In, Out,
Clock
Crystal Oscillator
Function Codes
Freeze
Halt
Instruction Pipeline
Interrupt Request Level
Master In Slave Out
Clock Mode Select
Master Out Slave In
Port C
Peripheral Chip Select
Port E
Port F
Port QS
Table 6 MCU Signal Function
Mnemonic
Function
ADDR[23:0] 24-bit address bus
AS
Indicates that a valid address is on the address bus
AVEC
Requests an automatic vector during interrupt acknowledge
BERR
Indicates that a bus error has occurred
BG
Indicates that the MCU has relinquished the bus
BGACK Indicates that an external device has assumed bus mastership
BKPT
Signals a hardware breakpoint to the CPU
BR
Indicates that an external device requires bus mastership
CLKOUT System clock output
CS[10:0] Select external devices at programmed addresses
CSBOOT Chip select for external boot start-up ROM
DATA[15:0] 16-bit data bus
DS
During a read cycle, indicates when it is possible for an external
device to place data on the data bus. During a write cycle, indi-
cates that valid data is on the data bus.
DSACK[1:0] Provide asynchronous data transfers and dynamic bus sizing
DSI, DSO, Serial I/O and clock for background debugging mode
DSCLK
EXTAL, XTAL Connections for clock synthesizer circuit reference;
a crystal or an external oscillator can be used
FC[2:0] Identify processor state and current address space
FREEZE Indicates that the CPU has entered background mode
HALT
Suspend external bus activity
IFETCH
IPIPE
Indicate instruction pipeline activity
IRQ[7:1] Provides an interrupt priority level to the CPU
MISO
Serial input to QSPI in master mode;
serial output from QSPI in slave mode
MODCLK Selects the source and type of system clock
MOSI
Serial output from QSPI in master mode;
serial input to QSPI in slave mode
PC[6:0] SIM digital output port signals
PCS[3:0] QSPI peripheral chip selects
PE[7:0] SIM digital I/O port signals
PF[7:0] SIM digital I/O port signals
PQS[7:0] QSM digital I/O port signals
MC68332
MC68332TS/D
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