MC33981 Datasheet, PDF (13/37 Pages) Motorola, Inc – High-Frequency, High-Current, Self-Protected High-Side Switch (4.0 mΩ up to 60 kHz)

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The 33981 has 2 operating modes: Sleep and Normal
depending on EN input.
SLEEP MODE
Sleep Mode is the state of the 33981 when the EN is
logic [0]. In this mode, OUT, the gate driver for the external
MOSFET, and all unused internal circuitry are off to minimize
current draw.
Table 5. Operating Modes
Condition CONF INHS INLS OUT GLS
FS
Sleep
x
x
x
x
x
H
Normal
L
H
H
H
H
H
Normal
L
L
L
L
L
H
Normal
L
L
H
L
H
H
Normal
L
H
L
H
L
H
Normal
H PWM H PWM PWM_bar H
H = High level
L = Low level
x = Don’t care
PWM_bar = Opposite of pulse-width modulation signal.
NORMAL MODE
The 33981 will go to the Normal operating mode when the
EN pin is logic [1]. The INHS and INLS commands will be
disabled t_ON after the EN transitions to logic [1] to enable the
charge of the bootstrap capacitor.
EN
Comments
L ^{Device is in Sleep Mode. The OUT and low side gate are OFF.}
H ^{Normal Mode. High side and low side are controlled}
independently. The high side and the low side are both on.
H ^{Normal Mode. High side and low side are controlled}
independently. The high side and the low side are both off.
H ^{Normal Mode. Half-bridge configuration. The high side is off}
and the low side is on.
H ^{Normal Mode. Half-bridge configuration. The high side is on}
and the low side is off.
H Normal Mode. Cross-conduction management is activated.
Half-bridge configuration.
PROTECTION AND DIAGNOSTIC FEATURES
UNDER-VOLTAGE
The 33981 incorporates under-voltage protection. In case
of V_PWR<V_PWR(UV), the OUT is switched OFF until the power
supply rises to V_PWR(UV)+V_PWR(UVHYS). The latched fault are
reset below V_PWR(UV). The FS output pin reports the under-
voltage fault in real time.
OVER-TEMPERATURE FAULT
The 33981 incorporates over-temperature detection and
shutdown circuitry on OUT. Over-temperature detection also
protects the low side gate driver (GLS pin). Over-temperature
detection occurs when OUT is in the ON or OFF state and
GLS is at high or low level.
For OUT, an over-temperature fault condition results in
OUT turning OFF until the temperature falls below T_SD. This
cycle will continue indefinitely until the offending load is
removed. Figure 12 and Figure 18 show an over-temperature
on OUT.
An over-temperature fault on the low side gate drive
results in OUT turning OFF and the GLS going to 0V until the
temperature falls below T_SD. This cycle will continue until the
offending load is removed. FS pin transition to logic [1] will be
disabled typically t _ON after to enable the charge of the
bootstrap capacitor.
Over-temperature faults force the TEMP pin to 0 V.
OVER-CURRENT FAULT ON HIGH SIDE
The OUT pin has an over-current high-detection level
called I_OCH for maximum device protection. If at any time the
current reaches this level, OUT will stay OFF and the CSNS
pin will go to 0V. The OUT pin is reset (and the fault is
delatched) by a logic [0] at the INHS pin for at least t_RST(DIAG).
When INHS goes to 0 V, CSNS goes to 5.0 V.
In Figure 16, the OUT pin is short-circuited to 0V. When
the current reaches I_OCH, OUT is turned OFF within t_OCH
owing to internal logic circuit.
OVER-LOAD FAULT ON LOW SIDE
This fault detection is active when INLS is logic [1]. Low
side overload protection does not measure the current
Analog Integrated Circuit Device Data
Freescale Semiconductor
33981
13