P4080NXN1MMB Datasheet, PDF (1/2 Pages) Freescale Semiconductor, Inc – P4080 multicore processor

QorIQ™ Communications Platforms
P4 Series
P4080 multicore processor
Freescale QorIQ™ communications platforms
are the next-generation evolution of our
leading PowerQUICC^® communications
processors. Built using high-performance
Power Architecture^® cores, QorIQ platforms
enable a new era of networking innovation
where the reliability, security and quality of
service for every connection matters.
QorIQ P4080 Multicore Processor
The QorIQ P4080 multicore processor, the
first product offered in the QorIQ P4 platform
series, delivers industry-leading performance
in the under 30-watt power category.
It combines eight Power Architecture e500mc
cores operating at frequencies up to
1.5 GHz with high-performance datapath
acceleration logic, as well as networking
I/O and other peripheral bus interfaces.
The P4080, built in 45 nm technology, is
designed to deliver high-performance,
next-generation networking services in a
very low power envelope.
The QorIQ P4080 processor is designed for
combined control and dataplane processing,
enabling high-performance layers 2–7
processing. Its high level of integration offers
significant performance benefits compared to
multiple discrete devices, while also greatly
simplifying board design. The processor is
well-suited for applications that are highly
compute-intensive, I/O-intensive or both.
This makes it ideal for applications such
as enterprise and service provider routers,
switches, media gateways, base station
controllers, radio network controllers (RNCs),
access gateways for Long Term Evolution (LTE)
and general-purpose embedded computing
systems in the networking, telecom, industrial,
aerospace and defense markets.
Key Features
Freescale delivers a groundbreaking three-
tiered cache hierarchy on the QorIQ P4
platform. Each core has an integrated Level 1
(L1) cache as well as a dedicated Level 2 (L2)
backside cache that can significantly improve
performance. Finally, a multi-megabyte Level
3 (L3) cache is also provided for those tasks
for which a shared cache is desirable.
The CoreNet™ coherency fabric is a key
design component of the QorIQ P4 platform.
It manages full coherency of the caches and
provides scalable on-chip, point-to-point
connectivity supporting concurrent traffic to
and from multiple resources connected to the
fabric, eliminating single-point bottlenecks
for non-competing resources. This eliminates
bus contention and latency issues associated
with scaling shared bus/shared memory
architectures that are common in other
multicore approaches.
QorIQ™ P4080 Block Diagram
RegEx
Pattern
Matching
Engine
Encryption
Buffer Queue
Manager Manager
128 KB
Backside
L2 Cache
Power Architecture^®
e500mc Core
32 KB
32 KB
L1 I-Cache L1 D-Cache
CoreNet™ Coherency Fabric
1024 KB
Frontside
L3 Cache
1024 KB
Frontside
L3 Cache
Enhanced
Local Bus
Controller
(eLBC)
DDR2/DDR3
SDRAM Controller
DDR2/DDR3
SDRAM Controller
2 x DUART, 4 x I²C,
Interrupt Control,
GPIO, SD/MMC, SPI,
2 x USB 2.0/ULPI
Frame Manager
Frame Manager
1 x 10 Gbps 4 x 1 Gbps 1 x 10 Gbps 4 x 1 Gbps
Ethernet Ethernet
Ethernet Ethernet
On-Chip Network
3 x PCI RapidIO Message 2 x Serial 2 x 4-ch.
Express^®
Unit (RMU)
RapidIO^® DMA
Real-Time
Debug
Core
Acceleration
Interface
18-lane SerDes