MHVIC2114R2 Datasheet, PDF (1/9 Pages) Motorola, Inc – RF LDMOS Wideband Integrated Power Amplifier

Freescale Semiconductor
Technical Data
Replaced by MHVIC2114NR2. There are no form, fit or function changes with this part
replacement. N suffix indicates RoHS compliant part.
RF LDMOS Wideband Integrated
Power Amplifier
The MHVIC2114R2 wideband integrated circuit is designed for base station
applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS
IC technology and integrates a multi - stage structure. Its wideband On - Chip
matching design makes it usable from 1600 to 2600 MHz. The linearity
performances cover all modulation formats for cellular applications: CDMA and
W - CDMA. The device is in a PFP - 16 flat pack package that provides
excellent thermal performance through a solderable backside contact.
Final Application
• Typical Two - Tone Performance: V_DD = 27 Volts, I_DQ1 = 95 mA, I_DQ2 =
204 mA, I_DQ3 = 111 mA, P_out = 15 Watts PEP, Full Frequency Band
Power Gain — 32 dB
IMD — - 30 dBc
Driver Application
• Typical Single - Channel W - CDMA Performance: V_DD = 27 Volts, I_DQ1 =
96 mA, I_DQ2 = 204 mA, I_DQ3 = 111 mA, P_out = 23 dBm, 2110 - 2170 MHz,
3GPP Test Model 1, Measured in a 3.84 MHz BW @ 5 MHz Offset, 64
DTCH, Peak/Avg. = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain — 32 dB
ACPR — - 58 dBc
• P1dB = 14 Watts, Gain Flatness = 0.2 dB from 2110 to 2170 MHz
• Capable of Handling 3:1 VSWR, @ 27 Vdc, 2140 MHz, 15 Watts CW
Output Power
• Characterized with Series Equivalent Large - Signal Impedance Parameters
and Common Source Scattering Parameters
• On - Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output)
• Integrated Temperature Compensation with Enable/Disable Function
• Integrated ESD Protection
• In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
Document Number: MHVIC2114R2
Rev. 4, 8/2006
MHVIC2114R2
2100 MHz, 27 V, 23 dBm
SINGLE W - CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIER
16
1
CASE 978 - 03
PFP - 16
V_GS3
V_GS2
V_GS1
RF_in I_C
V_DS1
V_DS2
Quiescent Current
Temperature Compensation
3 Stages I_C
Figure 1. Block Diagram
V_DS3/RF_out
N.C. 1
V_GS3 2
V_GS2 3
V_GS1 4
RF_in 5
RF_in 6
V_DS1 7
V_DS2 8
16 N.C.
15 ^VDS3^/RFout
14 ^VDS3^/RFout
13 ^VDS3^/RFout
12 ^VDS3^/RFout
11 ^VDS3^/RFout
10 V_DS3/RF_out
9 ^N.C.
(Top View)
Note: Exposed backside flag is source
terminal for transistors.
Figure 2. Pin Connections
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
RF Device Data
Freescale Semiconductor
MHVIC2114R2
1