MC100ES6210 Datasheet, PDF (1/8 Pages) Freescale Semiconductor, Inc – Low Voltage 2.5/3.3 V Differential ECL/PECL/HSTL Fanout Buffer

Freescale Semiconductor
Technical Data
MC100ES6210
Rev 3, 02/2005
Low Voltage 2.5/3.3 V Differential
ECL/PECL/HSTL Fanout Buffer
MC100ES6210
The MC100ES6210 is a bipolar monolithic differential clock fanout buffer.
Designed for most demanding clock distribution systems, the MC100ES6210
supports various applications that require to distribute precisely aligned
differential clock signals. Using SiGe technology and a fully differential
architecture, the device offers very low clock skew outputs and superior digital
signal characteristics. Target applications for this clock driver is high performance
clock distribution in computing, networking and telecommunication systems.
LOW VOLTAGE DUAL
1:5 DIFFERENTIAL PECL/ECL/HSTL
CLOCK FANOUT BUFFER
Features
• Dual 1:5 differential clock distribution
• 30 ps maximum device skew
• Fully differential architecture from input to all outputs
• SiGe technology supports near-zero output skew
• Supports DC to 3 GHz operation of clock or data signals
• ECL/PECL compatible differential clock outputs
• ECL/PECL compatible differential clock inputs
• Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply
• Standard 32 lead LQFP package
• Industrial temperature range
• Pin and function compatible to the MC100EP210
• 32-lead Pb-free Package Available
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-03
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-03
Functional Description
The MC100ES6210 is designed for low skew clock distribution systems and supports clock frequencies up to 3 GHz. The
device consists of two independent 1:5 clock fanout buffers. The input signal of each fanout buffer is distributed to five identical,
differential ECL/PECL outputs. Both CLKA and CLKB inputs can be driven by ECL/PECL compatible signals.
If V_BB is connected to the CLKA or CLKB input and bypassed to GND by a 10 nF capacitor, the MC100ES6210 can be driven
by single-ended ECL/PECL signals utilizing the V_BB bias voltage output.
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even
if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts
being used on that side should be terminated.
The MC100ES6210 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the
MC100ES6210 supports positive (PECL) and negative (ECL) supplies. The is function and pin compatible to the MC100EP210.
© Freescale Semiconductor, Inc., 2005. All rights reserved.