MC100ES6017 Datasheet, PDF (1/6 Pages) Freescale Semiconductor, Inc – 3.3V ECL/PECL Quad Differential Receiver

Freescale Semiconductor
Technical Data
3.3 V ECL/PECL Quad Differential
Receiver
The MC100ES6017 is a 3.3 V ECL/PECL quad differential receiver. Under
open input conditions, the D input will be biased at V_CC/2 and the D input will be
pulled down to V_EE. This operation will force the Q output LOW and ensure
stability.
For single-ended input conditions, the unused differential input is connected
to V_BB as a switching reference voltage. V_BB may also rebias AC coupled inputs.
When used, decouple V_BB and V_CC via a 0.01 µF capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, V_BB should be left open.
Features
• High bandwidth output transitions
• LVPECL operating range: V_CC = 3.0 V to 3.6 V
• Internal input pulldown resistors on D inputs, pullup and pulldown resistors on
D inputs
• 20 lead SOIC package
• Ambient temperature range -40°C to +85°C
• 20-lead Pb-free package available
Document Number: MC100ES6017
Rev 2, 09/2005
MC100ES6017
ECL/PECL QUAD
DIFFERENTIAL RECEIVER
DW SUFFIX
20-LEAD SOIC PACKAGE
CASE 751D-07
V_CC Q0
20 19
Q0 Q1 Q1
18 17 16
Q2 Q2 Q3 Q3 V_EE
15 14 13 12 11
12
V_CC D0
3 4 5 6 7 8 9 10
D0 D1 D1 D2 D2 D3 D3 V_BB
Figure 1. 20-Lead Pinout (Top View) and Logic Diagram
EG SUFFIX
20-LEAD SOIC PACKAGE
Pb-FREE PACKAGE
CASE 751D-07
ORDERING INFORMATION
Device
Package
MC100ES6017DW
SO-20
MC100ES6017DWR2
SO-20
MC100ES6017EG
SO-20 (Pb-Free)
MC100ES6017EGR2 SO-20 (Pb-Free)
PIN DESCRIPTION
Pin
Function
Dn, Dn ECL Differential Data Inputs
Qn, Qn ECL Differential Data Outputs
V_BB
Reference Voltage Output
V_CC
Positive Supply
V_EE
Negative Supply
© Freescale Semiconductor, Inc., 2005. All rights reserved.