MC100ES6014 Datasheet, PDF (1/8 Pages) Freescale Semiconductor, Inc – 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver

Freescale Semiconductor
Technical Data
2.5 V/3.3 V 1:5 Differential
ECL/PECL/HSTL/LVDS Clock Driver
The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock
distribution in mind, accepting two clock sources into an input multiplexer. The
ECL/PECL input signals can be either differential or single-ended (if the V_BB
output is used). HSTL and LVDS inputs can be used when the ES6014 is
operating under PECL conditions.
The ES6014 specifically guarantees low output-to-output skew. Optimal
design, layout, and processing minimize skew within a device and from device to
device.
To ensure that the tight skew specification is realized, both sides of any
differential output need to be terminated identically into 50 Ω even if only one
output is being used. If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
The common enable (EN) is synchronous, outputs are enabled/disabled in the
LOW state. This avoids a runt clock pulse when the device is enabled/disabled
as can happen with an asynchronous control. The internal flip flop is clocked on
the falling edge of the input clock; therefore, all associated specification limits are
referenced to the negative edge of the clock input.
The MC100ES6014, as with most other ECL devices, can be operated from a
positive V_CC supply in PECL mode. This allows the ES6014 to be used for high
performance clock distribution in +3.3 V or +2.5 V systems. Single ended CLK
input pin operation is limited to a V_CC ≥ 3.0 V in PECL mode, or V_EE ≤ –3.0 V in
ECL mode. Designers can take advantage of the ES6014's performance to
distribute low skew clocks across the backplane or the board.
Features
• 25 ps Within Device Skew
• 400 ps Typical Propagation Delay
• Maximum Frequency > 2 GHz Typical
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode: V_CC = 2.375 V to 3.8 V with V_EE = 0 V
• ECL Mode: V_CC = 0 V with V_EE = –2.375 V to –3.8 V
• LVDS and HSTL Input Compatible
• Open Input Default State
• 20-Lead Pb-Free Package Available
MC100ES6014
Rev 3, 06/2005
MC100ES6014
DT SUFFIX
20-LEAD TSSOP PACKAGE
CASE 948E-03
EJ SUFFIX
20-LEAD TSSOP PACKAGE
Pb-FREE PACKAGE
CASE 948E-03
ORDERING INFORMATION
Device
Package
MC100ES6014DT
TSSOP-20
MC100ES6014DTR2
TSSOP-20
MC100ES6014EJ
TSSOP-20 (Pb-Free)
MC100ES6014EJR2 TSSOP-20 (Pb-Free)
© Freescale Semiconductor, Inc., 2005. All rights reserved.