F71882 Datasheet, PDF (76/130 Pages) Feature Integration Technology Inc. – Super Hardware Monitor + LPC I/O

8.6.2.4 PECI AMDSI Select Register  Index 0Ah
Bit
Name
R/W Default
Description
7-6
Reserved
-
00 ^Reserved.
5
T1_IIR_EN
R/W
0 ^{Set 1 to enable IIR for AMDSI/PECI reading.}
The reading will be more stable.
4
SST_EN
R/W
0 ^{Set 1 to enable SST interface.}
0 ^{PECI (Vtt) voltage select.}
00: Vtt is 1.23V
3-2
VTT_SEL
R/W
01: Vtt is 1.13V
10: Vtt is 1.00V
11: Vtt is 1.00V
00 ^{CPU Temperature Measurement method.}
00: with external diode.
1-0 MEAS_TYPE R/W
01: with PECI interface.
10: with AMDSI interface.
11: reserved.
F71882
8.6.2.5 PECI CPU Select Register  Index 0Bh (MEAS_TYPE == 2’b01)
Bit
Name
R/W Default
Description
0 ^{Select the Intel CPU socket number.}
0000: no CPU presented. PECI host will use Ping() command to find CPU
address.
7-4
CPU_SEL
R/W
0001: CPU is in socket 0, i.e. PECI address is 0x30.
0010: CPU is in socket 0, i.e. PECI address is 0x31.
0100: CPU is in socket 0, i.e. PECI address is 0x32.
1000: CPU is in socket 0, i.e. PECI address is 0x33.
Otherwise are reserved.
3-1
Reserved
-
0 ^Reserved.
0
DOMAIN1_EN
R/W
0 ^{If the CPU selected is dual core. Set this register 1 to read the temperature}
of domain1.
8.6.2.6 AMDSI Version Register  Index 0Bh (MEAS_TYPE ==2’b10)
Bit
Name
R/W Default
Description
7-0
AMDSI_VER
R
- Return the AMDSI version.
8.6.2.7 TCC Temp. Register  Index 0Ch (MEAS_TYPE == 2’b01)
Bit
Name
R/W Default
Description
8’h55 ^{TCC Activation Temperature.}
7-0
TCC_TEMP
R/W
The absolute value of CPU temperature is calculated by the equation:
CPU_TEMP = TCC_TEMP + PECI Reading.
The range of this register is 0 ~ 255.
8.6.2.8 AMDSI Node ID Register  Index 0Ch (MEAS_TYPE ==2’b10)
Bit
Name
R/W Default
Description
7-0
NODE_ID
R
- Return the AMDSI node id.
8.6.2.9 SST Address Register  Index 0Dh
Bit
Name
R/W Default
-70-
Description
May, 2008
V0.28P