F75113 Datasheet, PDF (74/87 Pages) Feature Integration Technology Inc. – Low Power GPIO with LED Function

F75113
8.2.39 GPIO4X Edge Detector Enable Register ⎯ Index 78h
Bit
Name
R/W Default
Description
7 EN_GP47EDGE R/W
Enable GPIO47 Edge Detector. If this bit set to 1 and GPIO47
0 set to input mode (70h) will enable GPIO47 edge detection.
Default is disabled.
6 EN_GP46EDGE R/W
Enable GPIO46 Edge Detector. If this bit set to 1 and GPIO46
0 set to input mode (70h) will enable GPIO36 edge detection.
Default is disabled.
5 EN_GP45EDGE R/W
Enable GPIO45 Edge Detector. If this bit set to 1 and GPIO45
0 set to input mode (70h) will enable GPIO35 edge detection.
Default is disabled.
4 EN_GP44EDGE R/W
Enable GPIO44 Edge Detector. If this bit set to 1 and GPIO44
0 set to input mode (70h) will enable GPIO34 edge detection.
Default is disabled.
3 EN_GP43EDGE R/W
Enable GPIO43 Edge Detector. If this bit set to 1 and GPIO43
0 set to input mode (70h) will enable GPIO33 edge detection.
Default is disabled.
2 EN_GP42EDGE R/W
Enable GPIO42 Edge Detector. If this bit set to 1 and GPIO42
0 set to input mode (70h) will enable GPIO32 edge detection.
Default is disabled.
1 EN_GP41EDGE R/W
Enable GPIO41 Edge Detector. If this bit set to 1 and GPIO41
0 set to input mode (70h) will enable GPIO31 edge detection.
Default is disabled.
0 EN_GP40EDGE R/W
Enable GPIO40 Edge Detector. If this bit set to 1 and GPIO40
0 set to input mode (70h) will enable GPIO30 edge detection.
Default is disabled.
8.2.40 GPIO4X Edge Detector Status Register ⎯ Index 79h
Bit
Name
R/W Default
Description
7 STS_GP47EDGE R
Indicate GPIO47 Edge Status. If set to 1, the edge of GPIO47
-
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
6 STS_GP46EDGE R
Indicate GPIO46 Edge Status. If set to 1, the edge of GPIO46
-
has occurred. Write 1 to clear this bit. Writing 0 is invalid.
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Dec,2011
V0.13P