F71862 Datasheet, PDF (71/110 Pages) Feature Integration Technology Inc. – Super Hardware Monitor + LPC I/O

Register
0x[HEX]
30
F71862
VID Device Configuration Registers (LDN CR07)
Register Name
MSB
Default Value
LSB
VID Device Enable Register
- - - - - - -0
60
Base Address High Register
00000000
61
Base Address Low Register
00000000
Register
0x[HEX]
F0
SPI Device Configuration Registers (LDN CR08)
Register Name
MSB
Default Value
SPI Control Register
000100
LSB
00
F1
SPI Timeout Value Register
00000100
F2
SPI Baud Rate Divisor Register
- - - - - 001
F3
SPI Status Register
0- - -0- - -
F4
SPI High Byte Data Register
00000000
F5
SPI Command Data Register
00000000
F6
SPI Chip Select Register
F7
SPI Memory Mapping Register
F8
SPI Operate Register
FA
SPI Low Byte Data Register
- - - - 0000
--------
00000000
00000000
FB
SPI Address High Byte Register
00000000
FC SPI Address Medium Byte Register
00000000
FD SPI Address Low Byte Register
00000000
FE
SPI Program Byte Register
00000000
FF
SPI Write Data Register
00000000
Register
0x[HEX]
30
PME and ACPI Device Configuration Registers (LDN CR0A)
Register Name
MSB
Default Value
PME Device Enable Register
------
LSB
-0
F0
PME Event Enable Register
- 0000000
F1
PME Event Status Register
--------
F4
ACPI Control Register
00000110
F5
ACPI Control Register
00011100
71
July, 2008
V.28P