F81485 Datasheet, PDF (5/12 Pages) Feature Integration Technology Inc. – 5V Low Power RS-485 Interface Transceiver

3 Pin Configuration
F81485
RO 1
R
RE 2
DE 3
DI 4
D
8 Vcc
7B
6A
5 GND
F81485
4 Pin Description
IN_t
- TTL level input pin.
O₄
- Output pin with 4mA driver.
P
- Power.
4.1. Power Pin
Pin
Pin Name
5
GND
8
VCC
4.2. Transceiver
Pin
Pin Name
1
RO
2
RE#
3
DE
Type
P
P
Description
GND.
4.75V< VCC < 5.25V power supply voltage input.
Type
O₄
IN_t
IN_t
Description
Receiver Output. When enabled (RE# is low), then if
A > B by 200 mV, RO is high.
A < B by 200 mV, RO is low.
Active Low Receiver Output Enable pin.
A low level enables the receiver output, RO.
A high level places it in a high impedance state.
Active High Driver Output Enable.
A high level enables the driver differential outputs, A and
B. The chip will function as a line driver.
A low level places it in a high impedance state. The chip
will function as a line receiver.
5
Jan, 2012
V0.11P