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F75387 Datasheet, PDF (26/48 Pages) Feature Integration Technology Inc. – ±1oC Accuracy H/W Monitor IC with Automatic Fan Speed Control
3
V3_EXC
2
V2_EXC
1
V1_EXC
0
VCC_EXC
F75387
A one indicates VIN3 exceeds the high or low limit. A zero indicates VIN3 is
R/W
in the safe region.
A one indicates VIN2 exceeds the high or low limit. A zero indicates VIN2 is
R/W
in the safe region.
A one indicates VIN1 exceeds the high or low limit. A zero indicates VIN1 is
R/W
in the safe region.
A one indicates VCC exceeds the high or low limit. A zero indicates VCC is in
R/W
the safe region.
8.10. IRQ/SMI# ENABLE Register 2  Index 33h
Power-on default [7:0] =0000_0000 b
Bit
Name
Attribute
Description
7
Reserved
RO
Return one when read.
6
EN_OVT2_SMI
R/W
Enable temperature 2 OVT fault trigger SMI resister.
5
EN_OVT1_SMI
R/W Enable temperature 1 OVT fault trigger SMI resister.
4
EN_OVT0_SMI
R/W Enable temperature 0 (local temperature) OVT fault trigger SMI resister.
3
EN_V3_FAULT_SMI
R/W
Enable Voltage 3 fault trigger SMI resister.
2
EN_V2_FAULT_SMI
R/W
Enable Voltage 2 fault trigger SMI resister.
1
EN_V1_FAULT_SMI
R/W
Enable Voltage 1 fault trigger SMI resister.
0
EN_VCC_FAULT_SMI R/W
Enable Voltage VCC fault trigger SMI resister.
8.11. Interrupt Status Register 2  Index 34h
Power-on default [7:0] =0000_0000 b
Bit
Name
Attribute
Description
7
Reserved
RO
Return 0 when read.
A one indicates VT2 temperature sensor has exceeded high limit or
6
OVT2_SMI_STS
R/W
below the hysteresis limit. Write 1 to clear this bit, write 0 will be ignored.
A one indicates VT1 temperature sensor has exceeded high limit or
5
OVT1_SMI_STS
R/W
below the hysteresis limit. Write 1 to clear this bit, write 0 will be ignored.
A one indicates VT0 temperature sensor (local temperature) has
4
OVT0_SMI_STS
R/W exceeded the high limit or below the hysteresis limit. Write 1 to clear this
bit, write 0 will be ignored.
A one indicates VIN3 has exceeded the high or low limit continuously for
3
V3_FAULT_SMI_STS
R/W
the times set by V_FAULT_QUEUE register. Write 1 to clear this bit,
write 0 will be ignored.
24
July, 2007
0.27P