F71869A Datasheet, PDF (149/156 Pages) Feature Integration Technology Inc. – Super I/O + Hardware Monitor

11. Application Circuit
(GND close to IC)
RSMRST#
COPEN#
D-
D3+
D2+
D1+
VREF
VIN6
VIN5
VDIMM(VIN4)
VDDA(VIN3)
VBAT
<Part Ref erence>
VLDT(VIN2)
VCORE(VIN1)
VSB3V
SLCT
PE
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
DCD1#
RI1#
CTS1#
DTR1#
RTS1#
DSR1#
SOUT1
SIN1
DCD2#
RI2#
CTS2#
97
98
99
VIN2(VLDT)
VIN1(VCORE)
100 ^3VSB
101
102
103
104
105
106
107
108
109
SLCT/GPIO60
PE/GPIO61
BUSY /GPIO62
ACK#/GPIO63
SLIN#
INIT#/GPIO64
ERR#/GPIO65
AFD#/GPIO66
STB#/GPIO67
110
111
112
113
114
115
116
117
118
PD0/GPIO70
PD1/GPIO71
PD2/GPIO72
PD3/GPIO73
PD4/GPIO74
PD5/GPIO75
PD6/GPIO76
PD7/GPIO77
GND
119
120
121
122
123
124
125
126
127
DCD1#
RI1#
CTS1#
DTR1#/FAN40_100
RTS1#/STRAP_PROTECT
DSR1#
SOUT1/STRAP4E_2E
SIN1
DCD2#/SEGG/GPIO20
128
RI2#/SEGF/GPIO21
CTS2#/SEGA/GPIO22
DTR2#
RTS2#
DSR2#
VCC3V
SOUT2
SIN2
F71869_10
DENSEL#
MOA#
DRVA#
WDATA#
DIR#
STEP#
HDSEL#
WGATE#
RDATA#
TRK0#
INDEX#
WPT#
DSKCHG#
F71869A
F71869A
S3
ATXPG_IN
I_3VSB
PWOK
PSON#
S3#
PSOUT#
PSIN#
PME#
S4#
PCIRST3#
PCIRST2#
PCIRST1#
MCLK
MDAT
KCLK
KDAT
VSB3V VCC3V
C58 ^ATXPG_IN
0.1U
R1
R5
4.7k
4.7k
RSMRST#
PWOK
RSMRST# and PWOK pull-up
OVT#
CPU_PWGD
LED_VCC
GPIO15/LED_VSB/ALERT#
64
63
WDTRST#/GPIO14 ₆₂
S0P5_Gate#/GPIO13/BEEP
GPIO12/RSTCON#
GPIO11/PCI_RST5#/SDA
GPIO10/PCI_RST4#/SCL
PECI/SDA
CIR_LED#/SCL
S3_Gate#/GPIO05/WDTRST#
S3P5_Gate#/SLOTOCC#/GPIO04
SUS_WARN#/TIMING_1
61
60
59
58
57
56
55
54
53
SUS_ACK#/TIMING_2
STRAP_TIMING
CIRRX#/GPIO03
CIRTX/GPIO02
CIRWB#/GPIO01
GND
SLP_SUS#/TIMING_4
DPWROK/TIMING_3
5VSB
52
51
50
49
48
47
46
45
44
ERP_CTRL1#
ERP_CTRL0#
EVENT_IN0#
GA20
KBRST#
CLKIN
PCICLK
3VCC
LAD3
43
42
41
40
39
38
37
36
35
LAD2
LAD1
LAD0
34
33
WDTRST#
STRAP_TIMING
GA20
KBRST#
CLK_24/48M
LED_VSB
WDTRST#
S0P5_Gate#
RSTCON#
IBX_DAT
IBX_CLK
PECI
CIRLED#
S3_Gate#
S3P5_Gate#
SUS_WARN#/TIMING_1
SSTURSA_PA_CTKI#M/ITNIMGING5_V2A
CIRRX#
CIRTX
CIRWB#
R115
SLP_SUS#/TIMING_4 ^10R
DPWROK/TIMING_3
CTRL1#
CTRL0#
EVEN_IN#
GA20
KBRST#
CLK_24/48M
PCICLK
VCC3V
LAD3
LAD2
LAD1
LAD0
C6
0.1U
VCC5V
WPT#
R4 1K INDEX#
R6 1K TRK0#
R2 1K RDATA#
R3 1K DSKCHG#
R7 1K
J1
1
3
1
5
7
9
11
13
3
5
7
9
11
15
17
19
13
15
17
21 ¹⁹
23
25
27
29
31
21
23
25
27
29
33
31
33
2
2
4
4
6
8
10
12
6
8
10
12
14
14
16
18
16
18
20
20 ₂₂
22
24
26
28
30
24
26
28
30
32
32
34
34
HEADER 17X2
DENSEL#
INDEX#
MOA#
DRVA#
DIR#
STEP#
WDATA#
WGATE#
TRK0#
WPT#
RDATA#
HDSEL#
DSKCHG#
FLOPPY CONN.
STRAP_TIMING
DTR1#
SOUT1#
FANCTL1
FANCTL2
FANCTL3
RTS1#
SOUT2
R8 R9 R10 R11 R12 R14 X_R128 X_R129
1K 1K 1K 1K 1K 1K
1K 1K
POWER-ON TRIP
PIN
Function NET Name
HI
LO
26
FANCTL3
FANCTL3
PWM FAN
LINEAR FAN
24
FANCTL2
FANCTL2
PWM FAN
LINEAR FAN
22
FANCTL1
FANCTL1
PWM FAN
LINEAR FAN
121
DTR1#
FAN40_100 FAN SPEED DUTY:40% FAN SPEED DUTY:100%
124
SOUT1# Config 4E/2E
4E
2E
52 TIMING/GPIO TIMING/GPIO
TIMING
GPIO
5
SOUT2
STRAP_DPORT
80 PORT
COM2
122
RTS1#
STRAP_PROTECT
Disable UVP
Enable UVP
I_3VSB
LFRAME#
SERIRQ
LDRQ#
LRESET#
IRRX
IRTX
FANCTL3
FANIN3
FANCTL2
FANIN2
FANCTL1
FANIN1
149
D11 DIODE3VA
R140 NC/0R
VCC3VVCC3VVCC3VVSB3V VBAT
C1 C2 C3 C4
0.1U 0.1U0.1UF 0.1U
C5
0.1U
(Place capacitor close to IC)
VSB3V
R15 R16
4.7k 4.7k
S3_Gate#
S3P5_Gate#
S3_Gate# & S3P5_Gate# Pull-up
VBAT D12 DIODEVBAT
D13 DIODE I_3VSB
Title
Feature Integration Technology Inc.
Size Document Number
B
F71869ED&FDD
Rev
2.0
Date:
Thursday , February 10, 2011 Sheet
1
of 8
Oct., 2011
V0.19P