F72603R Datasheet, PDF (13/22 Pages) Feature Integration Technology Inc. – Fintek ACPI Controller IC Datasheet

Fintek
8. Registers Description
Feature Integration Technology Inc.
F72603R
8.1 PCIRST_N delay function Register, Default 0x03h ⎯ Index 01h
Bit
Name
PWD
Description
7 SLOT_SOFTRST
0 ^{SLOTRST_N Software reset, when set to 1, it will produce one low}
pulse signal to SLOTRST_N, and the pulse width is set by Register0
[1:0] (after Reset, the bit will clean to 0)
6 DEV_SOFTRST
0 ^{DEVICERST_N Software reset, when set to 1, it will produce one low}
pulse signal to DEVICERST_N, and the pulse width is set by
Register0 [1:0] (after Reset, the bit will clean to 0)
5 HDD_SOFTRST
0 ^{HDDRST_N Software reset, when set to 1, it will produce one low}
pulse signal to HDDRST_N, and the pulse width is set by Register0
[1:0] (after Reset, the bit will clean to 0)
4 SLOT_DELAY_EN ₀ Enable the delay function of SLOTRST_N from PCIRST_N, default =
0, if set to 1, the delay function is enable, the delay time is set by
Register0 [1:0]
3 DEV_DELAY_EN
0 ^{Enable the delay function of DEVICERST_N from PCIRST_N, default}
= 0, if set to 1, the delay function is enable, the delay time is set by
Register0 [1:0]
2 HDD_DELAY_EN 0 Enable the delay function of HDDRST_N from PCIRST_N, default =
0, if set to 1, the delay function is enable, the delay time is set by
Register0 [1:0]
1 DELAY[1]
1 The SLOTRST_N and DEVICERST_N and HDDRST_N signals are
0 DELAY[0]
1 delayed from PCIRST_N by followed setting
00
1ms
01
2ms
10
3ms
11
4ms
8.2 PWOKOUT delay function Register, Default 0x07h ⎯ Index 02h
Bit
Name
PWD
Description
-9 -
Apr 2004
V0.36