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FTLX1472M3BTL Datasheet, PDF (7/11 Pages) Finisar Corporation. – 10Gb/s Multi-Rate, 10km Single Mode SFP+ Transceiver | |||
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FTLX1472M3BTL Product Specifications
IX. Digital Diagnostic Specifications
The digital diagnostic monitors of the FTLX1472M3BTL transceivers are externally
calibrated.
Parameter
Symbol Units Min Max Accuracy Ref.
Accuracy
ï
Transceiver temperature
ïDDTemp
ºC -43
88
±5ºC
1
Transceiver supply voltage
ïDDVoltage
V
2.8
4.0
±3%
Transmitter bias current
ïDDBias
mA
0
20
±10%
2
Transmitter output power
ïDDTx-Power dBm
-8
+1
±2dB
Receiver average optical input power ïDDRx-Power dBm -17
+1.5
±2dB
Notes: 1. Internally measured
2. Accuracy of measured Tx bias current is 10% of the actual bias current from the laser driver to
the laser.
X. Internal CDRâs Locking Modes
The FTLX1472M3BTL is equipped with internal CDR units on both the receive and
the transmit sides. The host can set the CDRâs to lock at 8.5Gb/s, 10G (9.83-11.3Gb/s),
or in by-pass mode, by setting the rate select pins or the soft bits (logic OR). The
different locking modes are shown in the following logic table:
R/S 0
R/S 1
Logic OR of: Logic OR of:
pin 7 & bit 110.3 pin 9 & bit 118.3
CDRâs
Locking Mode
Low or 0
Low or 0 Both CDRâs lock at 8.5Gb/s
Low or 0
High or 1
Tx CDR is in bypass mode.
Rx CDR locks at 10G (9.83-11.3Gb/s)
High or 1
Low or 0 Tx & Rx CDRâs in bypass mode
High or 1
High or 1
Both CDRâs lock at 10G (9.83-11.3Gb/s)
The bits 110.3 and 118.3 are set to 1 by default at power-up
The RS0 and RS1 pins are internally pulled-down to ground as per [1]. The soft bits
110.3 and 118.3 are both set to â1â at the transceiver power-up, to select the 10G locking
mode by default. The host can change this configuration via the 2-wire communication as
described in the SFP MSA [1]. Alternative configurations can be factory set upon
request. Please refer to Finisar for additional details.
XI. SFF-8431 Power-up Sequence
The typical power consumption of the FTLX1472M3BTL will not exceed the limit of
1.5W specified in [1] for a Power Level II device. Moreover, the FTLX1472M3BTL is
factory set to power-up directly to its operating conditions, but upon request, it can be
factory set to follow the power-up sequence specified in the SFF-8431 for transceivers
exceeding 1W. When the transceiver is set into power level mode I, both CDRâs are set to
the bypass mode.
For additional details please, refer to [1] and Finisarâs Application Note AN-2076.
ï Finisar Corporation â October 2015
Rev. B1
Page 7
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