LPS200 Datasheet, PDF (1/2 Pages) Filtronic Compound Semiconductors – HIGH PERFORMANCE LOW NOISE PHEMT

• FEATURES
♦ 1.0 dB Noise Figure at 18 GHz
♦ 10 dB Associated Gain at 18 GHz
♦ Low DC Power Consumption
LPS200
HIGH PERFORMANCE LOW NOISE PHEMT
GATE
BOND
PAD (2X)
SOURCE
BOND
PAD (2x)
DRAIN
BOND
PAD (2X)
• DESCRIPTION AND APPLICATIONS
DIE SIZE: 12.6X10.2mils (320x260 µm)
DIE THICKNESS: 3.9 mils (100 µm)
BONDING PADS: 3.3X2.6 mils (85x65 µm)
The LPS200 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25 µm by 200 µm Schottky barrier gate. The recessed “mushroom” gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for high dynamic range. The LPS200 also features Si₃N₄ passivation and is available in
various packages.
Typical applications are as low noise devices for both narrowband and broadband amplifiers.
• ELECTRICAL SPECIFICATIONS @ T_Ambient = 25°C
Parameter
Symbol
Test Conditions
Saturated Drain-Source Current
Noise Figure
Associated Gain at minimum NF
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Thermal Resistivity
frequency=18 GHz
I_DSS
NF
G_A
I_MAX
G_M
I_GSO
V_P
Θ_JC
V_DS = 2 V; V_GS = 0 V
V_DS = 2 V; I_DS = 25% I_DSS
V_DS = 2 V; I_DS = 25% I_DSS
V_DS = 2 V; V_GS = 1 V
V_DS = 2 V; V_GS = 0 V
V_GS = -5 V
V_DS = 2 V; I_DS = 1 mA
Min Typ Max Units
15
25
50 mA
0.7 1.3 dB
9
10
dB
125
mA
50
70
mS
1
10 µA
-0.25 -0.8 -1.5 V
285
°C/W
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http:// www.filss.com
Revised: 1/23/01
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