FPD750DFN Datasheet, PDF (1/5 Pages) Filtronic Compound Semiconductors – LOW NOISE, HIGH LINEARITY PACKAGED PHEMTT

• PERFORMANCE (1850 MHz)
♦ 24 dBm Output Power (P_1dB)
♦ 20 dB Small-Signal Gain (SSG)
♦ 0.3 dB Noise Figure at 25% Bias
♦ 39 dBm Output IP3 at 50% Bias
♦ 45% Power-Added Efficiency
♦ Evaluation Boards Available
♦ Featuring Lead Free Finish Package
FPD750DFN
LOW NOISE, HIGH LINEARITY PACKAGED PHEMTT
• DESCRIPTION AND APPLICATIONS
The FPD750DFN is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron
Mobility Transistor (pHEMT). It utilizes a 0.25 μm x 750 μm Schottky barrier Gate, defined by
high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes
parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a
range of bias conditions and input power levels. The FPD750DFN is available in die form and in
other packages.
Typical applications include drivers or output stages in PCS/Cellular base station high-intercept-
point LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.
• ELECTRICAL SPECIFICATIONS AT 22°C
Parameter
Symbol
Test Conditions
Min Typ
RF SPECIFICATIONS MEASURED AT f = 1850 MHz USING CW SIGNAL
Power at 1dB Gain Compression
P_1dB
Small-Signal Gain
SSG
Power-Added Efficiency
PAE
Noise Figure
NF
Output Third-Order Intercept Point IP3
(from 15 to 5 dB below P_1dB)
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5 V; I_DS = 50% I_DSS;
P_OUT = P_1dB
V_DS = 5 V; I_DS = 50% I_DSS
V_DS = 5 V; I_DS = 25% I_DSS
V_DS = 5V; I_DS = 50% I_DSS
Matched for optimal power
Matched for best IP3
22.5 24
19 20
45
0.7
0.3
37
39
Max
1.1
0.9
Units
dBm
dB
%
dB
dBm
Saturated Drain-Source Current
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Gate-Source Breakdown Voltage
Gate-Drain Breakdown Voltage
I_DSS
I_MAX
G_M
I_GSO
|V_P|
|V_BDGS|
|V_BDGD|
V_DS = 1.3 V; V_GS = 0 V
V_DS = 1.3 V; V_GS ≅ +1 V
V_DS = 1.3 V; V_GS = 0 V
V_GS = -5 V
V_DS = 1.3 V; I_DS = 0.75 mA
I_GS = 0.75 mA
I_GD = 0.75 mA
180 230 280 mA
375
mA
200
mS
1
15 μA
0.7 1.0 1.3
V
12
16
V
12
16
V
Phone: [phone]
Fax: [phone]
http://www.filtronic.co.uk/semis
Revised: 11/14/05
Email: [e-mail]