FMP1617CA0 Datasheet, PDF (6/10 Pages) FIDELIX – 1M x 16 bit Super Low Power and Low Voltage Full CMOS RAM

FMP1617CA0(7)
Power Up Sequence
1. Apply Power.
2. Maintain stable power for a minimum of 200us with /CS1=VIH and CS2=VIH.
Timing Waveform of Power Up
Vcc(Min
VCC ⁾
Min. 200us
/CS1
CS2
Power up mode
Normal Operation
CMOS LPRAM
6
Revision 0.1
Jun. 2006