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FSQ500L_09 Datasheet, PDF (9/12 Pages) Fairchild Semiconductor – Compact, Green Mode, Fairchild Power Switch
3.1 Overload Protection (OLP): Overload is defined as
the load current exceeding its normal level due to an
unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in the normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger after a specified time to determine
whether the situation is transient or a true overload.
Because of the pulse-by-pulse current limit capability,
the maximum peak current through the senseFET is
limited and, therefore, the maximum input power is
restricted with a given input voltage. If the output
consumes more than this maximum power, the output
voltage (VO) decreases below the set voltage. This
reduces the current through the opto-coupler LED,
which also reduces the opto-coupler transistor current,
thus increasing the feedback voltage (VFB). If VFB
exceeds 2.7V, D1 is blocked and the 5µA current
source starts to charge CB slowly up to VCC. In this
condition, VFB continues increasing until it reaches
4.5V, when the switching operation is terminated, as
shown in Figure 18. The delay time for shutdown is the
time required to charge CB from 2.7V to 4.5V with 5µA.
In general, a 10 ~ 50ms delay time is typical for most
applications. This protection is implemented in auto
restart mode.
VFB
Overload protection
4.5V
2.7V
T12= CB*(4.5-2.7)/IDELAY
T1
Figure 18.Overload Protection
T2 t
VDS
Power
on
TSD
occurs
TSD
removed
VCC
6.5V
6.0V
5.7V
Normal
operation
Fault
situation
t
Normal
operation
Figure 19.Over-Temperature Protection (OTP)
4. Soft-Start: The soft-start time is tuned by an external
VCC capacitor (CA), which increases PWM comparator
non-inverting input voltage together with the senseFET
current slowly after it starts up. Before VCC reaches
VSTART, CA is charged by the current ICH-ISTART, where
ICH and ISTART are described in Figure 15. After VCC
reaches VSTART, all internal blocks are activated, so that
the current consuming inside IC becomes IOP.
Therefore, CA is charged by the current ICH-IOP, which
makes the increasing slope of VCC become sluggish.
VCC is shifted by 6.0V negatively (it is performed in soft-
start block in Figure 2), and then VCC -6.0V is an input
of one of the input terminals of the PWM comparator.
The drain current follows VCC -6.0V instead of the VFB*
because of the low-dominant feature of the PWM
comparator. The soft-start time can be made long or
short by selecting CA, as described in Figure 20. During
tS/S, IDELAY is disabled to avoid unwanted OLP. Typically,
tS/S is around 4.6ms with 27µF of CA.
VCC
tS/S
6.5V
6V
VCCREG
VSTART
5V
VSTOP
3.2 Thermal Shutdown (TSD): The senseFET and the
control IC in one package makes it easy for the control
IC to detect an abnormal over temperature of the
senseFET. When the temperature exceeds
approximately 140°C, the thermal shutdown triggers.
When TSD triggers, delay current is disabled, switching
operation stops, and VCC through the internal high-
voltage current source is set to 5.7V from 6.5V, as
shown in Figure 19. Since TSD signal prohibits the
senseFET from switching, there is no switching until the
junction temperature decreases sufficiently. If the
junction temperature is lower than 60°C typically, TSD
signal is removed and VCC is set to 6.5V again. While
VCC increases from 5.7V to 6.5V, the soft-start function
makes the senseFET turn on and off with no voltage
and/or current stress.
t1
t2
t
t1=CA×6V/(ICH-ISTART) tS/S=CA×0.5V/(ICH-IOP)
Figure 20.Soft-Start Function
The peak value of the drain current of the power
switching device is progressively increased to establish
the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps to prevent transformer saturation and reduce
stress on the secondary diode during startup.
© 2008 Fairchild Semiconductor Corporation
FSQ500L • Rev. 1.0.1
9
www.fairchildsemi.com