FIN1027_09 Datasheet, PDF (9/11 Pages) Fairchild Semiconductor – 3.3V LVDS, 2-Bit, High-Speed, Differential Driver

Physical Dimensions
6.20
5.80
5.00
4.80
3.81
8
A
5
B
4.00
3.80
1.75
0.65
5.60
PIN ONE
1
INDICATOR
(0.33)
4
1.27
0.25 M C B A
1.27
LAND PATTERN RECOMMENDATION
0.25
0.10
1.75 MAX
R0.10
R0.10
8°
0°
0.90
0.406
C
0.51
0.33
0.10 C
0.50
0.25
x
45°
GAGE PLANE
0.36
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
SEE DETAIL A
0.25
0.19
OPTION A - BEVEL EDGE
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
Figure 22. 8-Lead, Small Outline Package (SOIC), JEDEC MS-012, 0.150-inch, Narrow Body
Click here for tape and reel specifications, available at:
http://www.fairchildsemi.com/products/discrete/pdf/soic8_tr.pdf
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the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
9
www.fairchildsemi.com