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74ACT32SCX Datasheet, PDF (9/10 Pages) Fairchild Semiconductor – Quad 2-Input OR Gate | |||
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Physical Dimensions (Continued)
19.56
18.80
14
1
8
6.60
6.09
7
(1.74)
3.56
3.30
1.77
1.14
5.33 MAX
3.81
3.17
0.38 MIN
0.58
0.35
2.54
NOTES: UNLESS OTHERWISE SPECIFIED
THIS PACKAGE CONFORMS TO
A) JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS ARE EXCLUSIVE OF BURRS,
C) MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5-1994
E) DRAWING FILE NAME: MKT-N14AREV7
8.12
7.62
0.35
0.20
8.82
Figure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package speciï¬cations do not expand the terms of Fairchildâs worldwide terms and conditions,
speciï¬cally the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductorâs online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC32, 74ACT32 Rev. 1.4.1
9
www.fairchildsemi.com
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