FMS6404 Datasheet, PDF (8/9 Pages) Fairchild Semiconductor – Precision Composite Video Output with Sound Trap and Group Delay Compensation

Physical Dimensions
6.20
5.80
5.00
4.80
3.81
8
A
5
B
4.00
3.80
1.75
0.65
5.60
PIN ONE
1
INDICATOR
(0.33)
0.25
0.10
1.75 MAX
4
1.27
0.25
CBA
1.27
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
C
0.19
R0.10
R0.10
8°
0°
0.90
0.40
0.51
0.10 C
0.33
0.50
0.25
x 45°
GAGE PLANE
0.36
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
OPTION A - BEVEL EDGE
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
Figure 15. 8-Lead, Small-Outline Integrated Circuit (SOIC), JEDEC MS-012, .150" Narrow Body
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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© 2011 Fairchild Semiconductor Corporation
FMS6404 • Rev. 1.0.0
8
www.fairchildsemi.com